On the TC35892, a random delayed interrupt clear (GPIO IC) write locks up the
child interrupts. In such a case, the original interrupt is active and not yet
acknowledged. Re-check the IRQST bit for any pending interrupts and handle
those.
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
struct tc3589x *tc3589x = data;
int status;
+again:
status = tc3589x_reg_read(tc3589x, TC3589x_IRQST);
if (status < 0)
return IRQ_NONE;
/*
* A dummy read or write (to any register) appears to be necessary to
* have the last interrupt clear (for example, GPIO IC write) take
- * effect.
+ * effect. In such a case, recheck for any interrupt which is still
+ * pending.
*/
- tc3589x_reg_read(tc3589x, TC3589x_IRQST);
+ status = tc3589x_reg_read(tc3589x, TC3589x_IRQST);
+ if (status)
+ goto again;
return IRQ_HANDLED;
}