imx27: define and use MX27_IO_ADDRESS
authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Wed, 16 Dec 2009 16:30:27 +0000 (17:30 +0100)
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Fri, 8 Jan 2010 15:41:25 +0000 (16:41 +0100)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Rabin Vincent <rabin@rab.in>
Cc: Javier Martin <javier.martin@vista-silicon.com>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
arch/arm/mach-mx2/clock_imx27.c
arch/arm/mach-mx2/cpu_imx27.c
arch/arm/plat-mxc/include/mach/mx27.h

index 6db98566a720865697db770edf711c5e2b22f1e8..bb9f60318fde5cfe523fde92c8f172c32918d316 100644 (file)
@@ -29,7 +29,7 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 
-#define IO_ADDR_CCM(off)       (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))
+#define IO_ADDR_CCM(off)       (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))
 
 /* Register offsets */
 #define CCM_CSCR               IO_ADDR_CCM(0x0)
@@ -757,7 +757,7 @@ int __init mx27_clocks_init(unsigned long fref)
        clk_enable(&uart1_clk);
 #endif
 
-       mxc_timer_init(&gpt1_clk, IO_ADDRESS(MX27_GPT1_BASE_ADDR),
+       mxc_timer_init(&gpt1_clk, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR),
                        MX27_INT_GPT1);
 
        return 0;
index 8c50c5e7c03392f5d667e116c54340daa08868fd..d8d3b2d84dc577df1cf432cea73c0be29fdaadc4 100644 (file)
@@ -39,7 +39,8 @@ static void query_silicon_parameter(void)
         * the silicon revision very early we read it here to
         * avoid any further hooks
        */
-       val = __raw_readl(IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR) + SYS_CHIP_ID);
+       val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
+                               + SYS_CHIP_ID));
 
        cpu_silicon_rev = (int)(val >> 28);
        cpu_partnumber = (int)((val >> 12) & 0xFFFF);
index e2ae19f5171079b55f43f4de6652dc399b811699..cd292ffc1f7ee6a1b45a0580d3019c9345fe2e73 100644 (file)
 /* IRAM */
 #define MX27_IRAM_BASE_ADDR            0xffff4c00      /* internal ram */
 
+#define MX27_IO_ADDRESS(x) (                                           \
+       IMX_IO_ADDRESS(x, MX27_AIPI) ?:                                 \
+       IMX_IO_ADDRESS(x, MX27_SAHB1) ?:                                \
+       IMX_IO_ADDRESS(x, MX27_X_MEMC))
+
 /* fixed interrupt numbers */
 #define MX27_INT_I2C2          1
 #define MX27_INT_GPT6          2