sh-pfc: r8a7791: Fix DU pin groups organisation
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Wed, 13 Nov 2013 12:46:17 +0000 (13:46 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 25 Nov 2013 08:08:29 +0000 (09:08 +0100)
Rename the sync_1 group to sync as the device has a single sync pin
group for the DU, move the cde_disp mux array right after the
corresponding pins array, and split the clk_in pins in three separate
groups as the pins can be used independently.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/sh-pfc/pfc-r8a7791.c

index bf76a654c02f4d9d4f64b26e52c2e0acfadaa605..d26c16360161ae683026001d3d9ca93f4b425718 100644 (file)
@@ -1730,11 +1730,11 @@ static const unsigned int du_clk_out_1_pins[] = {
 static const unsigned int du_clk_out_1_mux[] = {
        DU1_DOTCLKOUT1_MARK
 };
-static const unsigned int du_sync_1_pins[] = {
+static const unsigned int du_sync_pins[] = {
        /* EXVSYNC/VSYNC, EXHSYNC/HSYNC, EXDISP/EXODDF/EXCDE */
        RCAR_GP_PIN(3, 29), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 27),
 };
-static const unsigned int du_sync_1_mux[] = {
+static const unsigned int du_sync_mux[] = {
        DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK,
        DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK
 };
@@ -1742,6 +1742,9 @@ static const unsigned int du_cde_disp_pins[] = {
        /* CDE DISP */
        RCAR_GP_PIN(3, 31), RCAR_GP_PIN(3, 30),
 };
+static const unsigned int du_cde_disp_mux[] = {
+       DU1_CDE_MARK, DU1_DISP_MARK
+};
 static const unsigned int du0_clk_in_pins[] = {
        /* CLKIN */
        RCAR_GP_PIN(6, 31),
@@ -1749,15 +1752,26 @@ static const unsigned int du0_clk_in_pins[] = {
 static const unsigned int du0_clk_in_mux[] = {
        DU0_DOTCLKIN_MARK
 };
-static const unsigned int du_cde_disp_mux[] = {
-       DU1_CDE_MARK, DU1_DISP_MARK
-};
 static const unsigned int du1_clk_in_pins[] = {
        /* CLKIN */
-       RCAR_GP_PIN(7, 20), RCAR_GP_PIN(7, 19), RCAR_GP_PIN(3, 24),
+       RCAR_GP_PIN(3, 24),
 };
 static const unsigned int du1_clk_in_mux[] = {
-       DU1_DOTCLKIN_C_MARK, DU1_DOTCLKIN_B_MARK, DU1_DOTCLKIN_MARK
+       DU1_DOTCLKIN_MARK
+};
+static const unsigned int du1_clk_in_b_pins[] = {
+       /* CLKIN */
+       RCAR_GP_PIN(7, 19),
+};
+static const unsigned int du1_clk_in_b_mux[] = {
+       DU1_DOTCLKIN_B_MARK,
+};
+static const unsigned int du1_clk_in_c_pins[] = {
+       /* CLKIN */
+       RCAR_GP_PIN(7, 20),
+};
+static const unsigned int du1_clk_in_c_mux[] = {
+       DU1_DOTCLKIN_C_MARK,
 };
 /* - ETH -------------------------------------------------------------------- */
 static const unsigned int eth_link_pins[] = {
@@ -2670,10 +2684,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(du_rgb888),
        SH_PFC_PIN_GROUP(du_clk_out_0),
        SH_PFC_PIN_GROUP(du_clk_out_1),
-       SH_PFC_PIN_GROUP(du_sync_1),
+       SH_PFC_PIN_GROUP(du_sync),
        SH_PFC_PIN_GROUP(du_cde_disp),
        SH_PFC_PIN_GROUP(du0_clk_in),
        SH_PFC_PIN_GROUP(du1_clk_in),
+       SH_PFC_PIN_GROUP(du1_clk_in_b),
+       SH_PFC_PIN_GROUP(du1_clk_in_c),
        SH_PFC_PIN_GROUP(eth_link),
        SH_PFC_PIN_GROUP(eth_magic),
        SH_PFC_PIN_GROUP(eth_mdio),
@@ -2805,7 +2821,7 @@ static const char * const du_groups[] = {
        "du_rgb888",
        "du_clk_out_0",
        "du_clk_out_1",
-       "du_sync_1",
+       "du_sync",
        "du_cde_disp",
 };
 
@@ -2815,6 +2831,8 @@ static const char * const du0_groups[] = {
 
 static const char * const du1_groups[] = {
        "du1_clk_in",
+       "du1_clk_in_b",
+       "du1_clk_in_c",
 };
 
 static const char * const eth_groups[] = {