serial: imx: Fix the CTS_B polarity in RS485 mode

When userspace passes the SER_RS485_RTS_ON_SEND flag it means that the
CTS_B pin should go to logic level high before the transmission begins.

CTS_B goes to logic level high when both CTSC and CTS bits are cleared.

When userspace passes the SER_RS485_RTS_AFTER_SEND flag it means that the
CTS_B pin should go to logic level low after the transmission finishes.

CTS_B goes to logic level low when CTSC bit is cleared and CTS bit is set.

So fix the CTS_B polarity logic.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 29dd57c51706c1725474eea6e6cb7884d15da2cf..e3e152cbc75e71d7bc4e966f8a4ec3a1884c2b95 100644 (file)
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -336,15 +336,15 @@ static void imx_port_ucrs_restore(struct uart_port *port,
 
 static void imx_port_rts_active(struct imx_port *sport, unsigned long *ucr2)
 {
-       *ucr2 &= ~UCR2_CTSC;
-       *ucr2 |= UCR2_CTS;
+       *ucr2 &= ~(UCR2_CTSC | UCR2_CTS);
 
        mctrl_gpio_set(sport->gpios, sport->port.mctrl | TIOCM_RTS);
 }
 
 static void imx_port_rts_inactive(struct imx_port *sport, unsigned long *ucr2)
 {
-       *ucr2 &= ~(UCR2_CTSC | UCR2_CTS);
+       *ucr2 &= ~UCR2_CTSC;
+       *ucr2 |= UCR2_CTS;
 
        mctrl_gpio_set(sport->gpios, sport->port.mctrl & ~TIOCM_RTS);
 }