gpu: ipu-v3: Add missing IDMAC channel names

This patch adds the remaining missing IDMAC channel names: VDIC channels
for combining, the separate alpha channels for the MEM->IC and MEM->DC
ASYNC channels, and the DC read, command, and output mask channels.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index c4ccc7944cefb60811a2df821375bbaa50d5324d..c3de7406474b095ec8a572f73b6ef1b4617f79b1 100644 (file)
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -102,18 +102,29 @@ enum ipu_channel_irq {
 #define IPUV3_CHANNEL_MEM_VDI_NEXT             10
 #define IPUV3_CHANNEL_MEM_IC_PP                        11
 #define IPUV3_CHANNEL_MEM_IC_PRP_VF            12
+#define IPUV3_CHANNEL_VDI_MEM_RECENT           13
 #define IPUV3_CHANNEL_G_MEM_IC_PRP_VF          14
 #define IPUV3_CHANNEL_G_MEM_IC_PP              15
+#define IPUV3_CHANNEL_G_MEM_IC_PRP_VF_ALPHA    17
+#define IPUV3_CHANNEL_G_MEM_IC_PP_ALPHA                18
+#define IPUV3_CHANNEL_MEM_VDI_PLANE1_COMB_ALPHA        19
 #define IPUV3_CHANNEL_IC_PRP_ENC_MEM           20
 #define IPUV3_CHANNEL_IC_PRP_VF_MEM            21
 #define IPUV3_CHANNEL_IC_PP_MEM                        22
 #define IPUV3_CHANNEL_MEM_BG_SYNC              23
 #define IPUV3_CHANNEL_MEM_BG_ASYNC             24
+#define IPUV3_CHANNEL_MEM_VDI_PLANE1_COMB      25
+#define IPUV3_CHANNEL_MEM_VDI_PLANE3_COMB      26
 #define IPUV3_CHANNEL_MEM_FG_SYNC              27
 #define IPUV3_CHANNEL_MEM_DC_SYNC              28
 #define IPUV3_CHANNEL_MEM_FG_ASYNC             29
 #define IPUV3_CHANNEL_MEM_FG_SYNC_ALPHA                31
+#define IPUV3_CHANNEL_MEM_FG_ASYNC_ALPHA       33
+#define IPUV3_CHANNEL_DC_MEM_READ              40
 #define IPUV3_CHANNEL_MEM_DC_ASYNC             41
+#define IPUV3_CHANNEL_MEM_DC_COMMAND           42
+#define IPUV3_CHANNEL_MEM_DC_COMMAND2          43
+#define IPUV3_CHANNEL_MEM_DC_OUTPUT_MASK       44
 #define IPUV3_CHANNEL_MEM_ROT_ENC              45
 #define IPUV3_CHANNEL_MEM_ROT_VF               46
 #define IPUV3_CHANNEL_MEM_ROT_PP               47
@@ -121,6 +132,7 @@ enum ipu_channel_irq {
 #define IPUV3_CHANNEL_ROT_VF_MEM               49
 #define IPUV3_CHANNEL_ROT_PP_MEM               50
 #define IPUV3_CHANNEL_MEM_BG_SYNC_ALPHA                51
+#define IPUV3_CHANNEL_MEM_BG_ASYNC_ALPHA       52
 
 int ipu_map_irq(struct ipu_soc *ipu, int irq);
 int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel,