[media] dt-bindings: Add bindings for i.MX media driver

Add bindings documentation for the i.MX media driver.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>

diff --git a/Documentation/devicetree/bindings/media/imx.txt b/Documentation/devicetree/bindings/media/imx.txt
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+Freescale i.MX Media Video Device
+=================================
+
+Video Media Controller node
+---------------------------
+
+This is the media controller node for video capture support. It is a
+virtual device that lists the camera serial interface nodes that the
+media device will control.
+
+Required properties:
+- compatible : "fsl,imx-capture-subsystem";
+- ports      : Should contain a list of phandles pointing to camera
+               sensor interface ports of IPU devices
+
+example:
+
+capture-subsystem {
+       compatible = "fsl,imx-capture-subsystem";
+       ports = <&ipu1_csi0>, <&ipu1_csi1>;
+};
+
+
+mipi_csi2 node
+--------------
+
+This is the device node for the MIPI CSI-2 Receiver core in the i.MX
+SoC. This is a Synopsys Designware MIPI CSI-2 host controller core
+combined with a D-PHY core mixed into the same register block. In
+addition this device consists of an i.MX-specific "CSI2IPU gasket"
+glue logic, also controlled from the same register block. The CSI2IPU
+gasket demultiplexes the four virtual channel streams from the host
+controller's 32-bit output image bus onto four 16-bit parallel busses
+to the i.MX IPU CSIs.
+
+Required properties:
+- compatible   : "fsl,imx6-mipi-csi2";
+- reg           : physical base address and length of the register set;
+- clocks       : the MIPI CSI-2 receiver requires three clocks: hsi_tx
+                 (the D-PHY clock), video_27m (D-PHY PLL reference
+                 clock), and eim_podf;
+- clock-names  : must contain "dphy", "ref", "pix";
+- port@*        : five port nodes must exist, containing endpoints
+                 connecting to the source and sink devices according to
+                 of_graph bindings. The first port is an input port,
+                 connecting with a MIPI CSI-2 source, and ports 1
+                 through 4 are output ports connecting with parallel
+                 bus sink endpoint nodes and correspond to the four
+                 MIPI CSI-2 virtual channel outputs.
+
+Optional properties:
+- interrupts   : must contain two level-triggered interrupts,
+                 in order: 100 and 101;