return ret;
}
+ dma_set_mask(&pdev->dev, DMA_BIT_MASK(36));
+
g2d_dev->clock = devm_clk_get(&pdev->dev, "gate");
if (IS_ERR(g2d_dev->clock)) {
dev_err(&pdev->dev, "Failed to get clock (%ld)\n",
#include <linux/dma-buf.h>
#include <linux/sync_file.h>
#include <linux/iommu.h>
-#include <linux/ion.h>
+#include <linux/ion_exynos.h>
#include <linux/slab.h>
#include <linux/sched/mm.h>
-#include <linux/exynos_ion.h>
#include <linux/exynos_iovmm.h>
#include <asm/cacheflush.h>
dmabuf = layer->buffer[i].dmabuf.dmabuf;
if ((layer->buffer_type == G2D_BUFTYPE_DMABUF) &&
- ion_cached_needsync_dmabuf(dmabuf) &&
- ion_may_hwrender_dmabuf(dmabuf)) {
+ ion_cached_dmabuf(dmabuf) &&
+ ion_hwrender_dmabuf(dmabuf)) {
dma_sync_sg_for_cpu(dev,
layer->buffer[i].dmabuf.sgt->sgl,
layer->buffer[i].dmabuf.sgt->orig_nents,
if (dir != DMA_TO_DEVICE)
prot |= IOMMU_WRITE;
- if (ion_cached_needsync_dmabuf(dmabuf)) {
+ if (ion_cached_dmabuf(dmabuf)) {
task->total_cached_len += buffer->payload;
- if ((dir == DMA_TO_DEVICE) && ion_may_hwrender_dmabuf(dmabuf))
+ if ((dir == DMA_TO_DEVICE) && ion_hwrender_dmabuf(dmabuf))
task->total_hwrender_len += buffer->payload;
}