#size-cells = <0>;
cell-index = <0>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ringclk 2>;
+ clocks = <&ap_syscon 3>;
status = "disabled";
};
#size-cells = <0>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
timeout-ms = <1000>;
- clocks = <&ringclk 2>;
+ clocks = <&ap_syscon 3>;
status = "disabled";
};
reg-shift = <2>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
- clocks = <&ringclk 2>;
+ clocks = <&ap_syscon 3>;
status = "disabled";
};
reg-shift = <2>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
- clocks = <&ringclk 2>;
+ clocks = <&ap_syscon 3>;
status = "disabled";
};
- dfx-server@6f8000 {
- compatible = "simple-mfd", "syscon";
- reg = <0x6f8000 0x70000>;
-
- coreclk: clk@204 {
- compatible = "marvell,armada-ap806-core-clock";
- #clock-cells = <1>;
- clock-output-names = "ddr", "ring", "cpu";
- };
-
- ringclk: clk@250 {
- compatible = "marvell,armada-ap806-ring-clock";
- #clock-cells = <1>;
- clock-output-names = "ring-0", "ring-2",
- "ring-3", "ring-4",
- "ring-5";
- clocks = <&coreclk 1>;
- };
+ ap_syscon: system-controller@6f4000 {
+ compatible = "marvell,ap806-system-controller",
+ "syscon";
+ #clock-cells = <1>;
+ clock-output-names = "ap-cpu-cluster-0",
+ "ap-cpu-cluster-1",
+ "ap-fixed", "ap-mss";
+ reg = <0x6f4000 0x1000>;
};
};
};