net: hns3: Fix for not setting rx private buffer size to zero

When rx private buffer is disabled, there may be some case that
the rx private buffer is not set to zero, which may cause buffer
allocation process to fail.
This patch fixes this problem by setting priv->enable to 0 and
priv->buf_size to zero when rx private buffer is disabled.

Fixes: 46a3df9f9718 ("net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support")
Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 796370adf99ce910b9daf29b34524568dbbc2ed8..a7d8fb1e15f6b74448c1610be04281405565ebba 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -1504,6 +1504,11 @@ int hclge_rx_buffer_calc(struct hclge_dev *hdev, u32 tx_size)
                                priv->wl.high = 2 * hdev->mps;
                                priv->buf_size = priv->wl.high;
                        }
+               } else {
+                       priv->enable = 0;
+                       priv->wl.low = 0;
+                       priv->wl.high = 0;
+                       priv->buf_size = 0;
                }
        }
 
@@ -1516,8 +1521,15 @@ int hclge_rx_buffer_calc(struct hclge_dev *hdev, u32 tx_size)
        for (i = 0; i < HCLGE_MAX_TC_NUM; i++) {
                priv = &hdev->priv_buf[i];
 
-               if (hdev->hw_tc_map & BIT(i))
-                       priv->enable = 1;
+               priv->enable = 0;
+               priv->wl.low = 0;
+               priv->wl.high = 0;
+               priv->buf_size = 0;
+
+               if (!(hdev->hw_tc_map & BIT(i)))
+                       continue;
+
+               priv->enable = 1;
 
                if (hdev->tm_info.hw_pfc_map & BIT(i)) {
                        priv->wl.low = 128;