powerpc/mm/hash: Store addr_limit in PACA

We optmize the slice page size array copy to paca by copying only the
range based on addr_limit. This will require us to not look at page size
array beyond addr_limit in PACA on slb fault. To enable that copy task
size to paca which will be used during slb fault.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
[mpe: Rename from task_size to addr_limit, consolidate #ifdefs]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index f48c250339fd70341a1f1052e100f1d9f318ed23..65d0ffb2aa3393fb0389b1d70b892f36aee3019a 100644 (file)
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -139,6 +139,7 @@ struct paca_struct {
 #ifdef CONFIG_PPC_MM_SLICES
        u64 mm_ctx_low_slices_psize;
        unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
+       unsigned long addr_limit;
 #else
        u16 mm_ctx_user_psize;
        u16 mm_ctx_sllp;

diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 4367e7df51a18567af06a86aab714ed0dda79211..795505e275351fff1727cdbb45e91615c2d33fe7 100644 (file)
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -185,6 +185,7 @@ int main(void)
 #ifdef CONFIG_PPC_MM_SLICES
        OFFSET(PACALOWSLICESPSIZE, paca_struct, mm_ctx_low_slices_psize);
        OFFSET(PACAHIGHSLICEPSIZE, paca_struct, mm_ctx_high_slices_psize);
+       DEFINE(PACA_ADDR_LIMIT, offsetof(struct paca_struct, addr_limit));
        DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
 #endif /* CONFIG_PPC_MM_SLICES */
 #endif

diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index a2c7a6456ee6471ffa9d452e0cc75bb38052fc8d..8d63627e067f7a43ce7168b53db515432554d63c 100644 (file)
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -254,6 +254,7 @@ void copy_mm_to_paca(struct mm_struct *mm)
        get_paca()->mm_ctx_id = context->id;
 #ifdef CONFIG_PPC_MM_SLICES
        VM_BUG_ON(!mm->context.addr_limit);
+       get_paca()->addr_limit = mm->context.addr_limit;
        get_paca()->mm_ctx_low_slices_psize = context->low_slices_psize;
        memcpy(&get_paca()->mm_ctx_high_slices_psize,
               &context->high_slices_psize, TASK_SLICE_ARRAY_SZ(mm));

diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index 1c503d07e0fb5fe2819b4d3cb0c0bd4890c7456e..1519617aab36d290357feafe4769834f5942f480 100644 (file)
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -149,7 +149,13 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
         * For userspace addresses, make sure this is region 0.
         */
        cmpdi   r9, 0
-       bne     8f
+       bne-    8f
+        /*
+         * user space make sure we are within the allowed limit
+        */
+       ld      r11,PACA_ADDR_LIMIT(r13)
+       cmpld   r3,r11
+       bge-    8f
 
        /* when using slices, we extract the psize off the slice bitmaps
         * and then we need to get the sllp encoding off the mmu_psize_defs