[NISTC_AO_UC_SAVE_REG] = { 0x128, 4 },
[NISTC_STATUS1_REG] = { 0x136, 2 },
[NISTC_DIO_SERIAL_IN_REG] = { 0x009, 1 },
- [Joint_Status_2_Register] = { 0x13a, 2 },
+ [NISTC_STATUS2_REG] = { 0x13a, 2 },
[AI_SI_Save_Registers] = { 0x180, 4 },
[AI_SC_Save_Registers] = { 0x184, 4 },
};
/* wait for DACs to be loaded */
for (i = 0; i < timeout; i++) {
udelay(1);
- if ((ni_stc_readw(dev, Joint_Status_2_Register) &
- AO_TMRDACWRs_In_Progress_St) == 0)
+ if ((ni_stc_readw(dev, NISTC_STATUS2_REG) &
+ NISTC_STATUS2_AO_TMRDACWRS_IN_PROGRESS) == 0)
break;
}
if (i == timeout) {
[NITIO_G01_STATUS] = { NISTC_G01_STATUS_REG, 2 },
[NITIO_G01_RESET] = { NISTC_RESET_REG, 2 },
[NITIO_G01_STATUS1] = { NISTC_STATUS1_REG, 2 },
- [NITIO_G01_STATUS2] = { Joint_Status_2_Register, 2 },
+ [NITIO_G01_STATUS2] = { NISTC_STATUS2_REG, 2 },
[NITIO_G0_DMA_CFG] = { 0x1b8, 2 }, /* M-Series only */
[NITIO_G1_DMA_CFG] = { 0x1ba, 2 }, /* M-Series only */
[NITIO_G0_DMA_STATUS] = { 0x1b8, 2 }, /* M-Series only */
#define NISTC_DIO_SERIAL_IN_REG 28
+#define NISTC_STATUS2_REG 29
+#define NISTC_STATUS2_AO_TMRDACWRS_IN_PROGRESS BIT(5)
+
#define AI_SI_Save_Registers 64
#define AI_SC_Save_Registers 66
-#define Joint_Status_2_Register 29
-enum Joint_Status_2_Bits {
- AO_TMRDACWRs_In_Progress_St = 0x20,
-};
-
/* command register */
#define G_Disarm_Copy _bit15 /* strobe */
#define G_Save_Trace_Copy _bit14