powerpc/fsl/dts: add FMan node for t1042d4rdb

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>

diff --git a/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts b/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
index 2a5a90dd272e290da584639c10dafac0742ab30d..fcd2aeb5b8ac8279efdc81f30c6ecb785d6962b6 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
@@ -48,6 +48,58 @@
                                        "fsl,deepsleep-cpld";
                };
        };
+
+       soc: soc@ffe000000 {
+               fman0: fman@400000 {
+                       ethernet@e0000 {
+                               phy-handle = <&phy_sgmii_0>;
+                               phy-connection-type = "sgmii";
+                       };
+
+                       ethernet@e2000 {
+                               phy-handle = <&phy_sgmii_1>;
+                               phy-connection-type = "sgmii";
+                       };
+
+                       ethernet@e4000 {
+                               phy-handle = <&phy_sgmii_2>;
+                               phy-connection-type = "sgmii";
+                       };
+
+                       ethernet@e6000 {
+                               phy-handle = <&phy_rgmii_0>;
+                               phy-connection-type = "rgmii";
+                       };
+
+                       ethernet@e8000 {
+                               phy-handle = <&phy_rgmii_1>;
+                               phy-connection-type = "rgmii";
+                       };
+
+                       mdio0: mdio@fc000 {
+                               phy_sgmii_0: ethernet-phy@02 {
+                                       reg = <0x02>;
+                               };
+
+                               phy_sgmii_1: ethernet-phy@03 {
+                                       reg = <0x03>;
+                               };
+
+                               phy_sgmii_2: ethernet-phy@01 {
+                                       reg = <0x01>;
+                               };
+
+                               phy_rgmii_0: ethernet-phy@04 {
+                                       reg = <0x04>;
+                               };
+
+                               phy_rgmii_1: ethernet-phy@05 {
+                                       reg = <0x05>;
+                               };
+                       };
+               };
+       };
+
 };
 
 #include "t1042si-post.dtsi"