rt2x00: convert rt2x00_desc_read return type
authorArnd Bergmann <arnd@arndb.de>
Wed, 17 May 2017 14:47:02 +0000 (16:47 +0200)
committerKalle Valo <kvalo@codeaurora.org>
Wed, 24 May 2017 13:45:37 +0000 (16:45 +0300)
This is a semi-automated conversion to change rt2x00_desc_read to return
the register contents instead of passing them by value, resulting in
much better object code. The majority of the patch was done using:

sed -i 's:\(\<rt2x00_desc_read\>(.*, .*\), &\(.*\));:\2 = \1);:' \
    -i 's:\(\<_rt2x00_desc_read\>(.*, .*\), &\(.*\));:\2 = \1);:' \
drivers/net/wireless/ralink/rt2x00/rt*

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/ralink/rt2x00/rt2400pci.c
drivers/net/wireless/ralink/rt2x00/rt2500pci.c
drivers/net/wireless/ralink/rt2x00/rt2500usb.c
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
drivers/net/wireless/ralink/rt2x00/rt2800usb.c
drivers/net/wireless/ralink/rt2x00/rt2x00queue.h
drivers/net/wireless/ralink/rt2x00/rt61pci.c
drivers/net/wireless/ralink/rt2x00/rt73usb.c

index 73b919838a61eb335a3426e80bccd2aec56945f5..0bc8b0249c571cd04094c2344289e765cbaa4bfa 100644 (file)
@@ -728,11 +728,11 @@ static bool rt2400pci_get_entry_state(struct queue_entry *entry)
        u32 word;
 
        if (entry->queue->qid == QID_RX) {
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
 
                return rt2x00_get_field32(word, RXD_W0_OWNER_NIC);
        } else {
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
 
                return (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) ||
                        rt2x00_get_field32(word, TXD_W0_VALID));
@@ -746,19 +746,19 @@ static void rt2400pci_clear_entry(struct queue_entry *entry)
        u32 word;
 
        if (entry->queue->qid == QID_RX) {
-               rt2x00_desc_read(entry_priv->desc, 2, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 2);
                rt2x00_set_field32(&word, RXD_W2_BUFFER_LENGTH, entry->skb->len);
                rt2x00_desc_write(entry_priv->desc, 2, word);
 
-               rt2x00_desc_read(entry_priv->desc, 1, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 1);
                rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma);
                rt2x00_desc_write(entry_priv->desc, 1, word);
 
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
                rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1);
                rt2x00_desc_write(entry_priv->desc, 0, word);
        } else {
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
                rt2x00_set_field32(&word, TXD_W0_VALID, 0);
                rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0);
                rt2x00_desc_write(entry_priv->desc, 0, word);
@@ -1113,16 +1113,16 @@ static void rt2400pci_write_tx_desc(struct queue_entry *entry,
        /*
         * Start writing the descriptor words.
         */
-       rt2x00_desc_read(txd, 1, &word);
+       word = rt2x00_desc_read(txd, 1);
        rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma);
        rt2x00_desc_write(txd, 1, word);
 
-       rt2x00_desc_read(txd, 2, &word);
+       word = rt2x00_desc_read(txd, 2);
        rt2x00_set_field32(&word, TXD_W2_BUFFER_LENGTH, txdesc->length);
        rt2x00_set_field32(&word, TXD_W2_DATABYTE_COUNT, txdesc->length);
        rt2x00_desc_write(txd, 2, word);
 
-       rt2x00_desc_read(txd, 3, &word);
+       word = rt2x00_desc_read(txd, 3);
        rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL, txdesc->u.plcp.signal);
        rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL_REGNUM, 5);
        rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL_BUSY, 1);
@@ -1131,7 +1131,7 @@ static void rt2400pci_write_tx_desc(struct queue_entry *entry,
        rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE_BUSY, 1);
        rt2x00_desc_write(txd, 3, word);
 
-       rt2x00_desc_read(txd, 4, &word);
+       word = rt2x00_desc_read(txd, 4);
        rt2x00_set_field32(&word, TXD_W4_PLCP_LENGTH_LOW,
                           txdesc->u.plcp.length_low);
        rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW_REGNUM, 8);
@@ -1147,7 +1147,7 @@ static void rt2400pci_write_tx_desc(struct queue_entry *entry,
         * the device, whereby the device may take hold of the TXD before we
         * finished updating it.
         */
-       rt2x00_desc_read(txd, 0, &word);
+       word = rt2x00_desc_read(txd, 0);
        rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1);
        rt2x00_set_field32(&word, TXD_W0_VALID, 1);
        rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
@@ -1228,10 +1228,10 @@ static void rt2400pci_fill_rxdone(struct queue_entry *entry,
        u32 rx_low;
        u32 rx_high;
 
-       rt2x00_desc_read(entry_priv->desc, 0, &word0);
-       rt2x00_desc_read(entry_priv->desc, 2, &word2);
-       rt2x00_desc_read(entry_priv->desc, 3, &word3);
-       rt2x00_desc_read(entry_priv->desc, 4, &word4);
+       word0 = rt2x00_desc_read(entry_priv->desc, 0);
+       word2 = rt2x00_desc_read(entry_priv->desc, 2);
+       word3 = rt2x00_desc_read(entry_priv->desc, 3);
+       word4 = rt2x00_desc_read(entry_priv->desc, 4);
 
        if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
                rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
@@ -1285,7 +1285,7 @@ static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev,
        while (!rt2x00queue_empty(queue)) {
                entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
                entry_priv = entry->priv_data;
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
 
                if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) ||
                    !rt2x00_get_field32(word, TXD_W0_VALID))
index 5fcee4855720299657d1903345e74c9c672f89e8..1ff5434798ecd5d196fd42142e97a0d45311ab77 100644 (file)
@@ -817,11 +817,11 @@ static bool rt2500pci_get_entry_state(struct queue_entry *entry)
        u32 word;
 
        if (entry->queue->qid == QID_RX) {
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
 
                return rt2x00_get_field32(word, RXD_W0_OWNER_NIC);
        } else {
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
 
                return (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) ||
                        rt2x00_get_field32(word, TXD_W0_VALID));
@@ -835,15 +835,15 @@ static void rt2500pci_clear_entry(struct queue_entry *entry)
        u32 word;
 
        if (entry->queue->qid == QID_RX) {
-               rt2x00_desc_read(entry_priv->desc, 1, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 1);
                rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma);
                rt2x00_desc_write(entry_priv->desc, 1, word);
 
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
                rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1);
                rt2x00_desc_write(entry_priv->desc, 0, word);
        } else {
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
                rt2x00_set_field32(&word, TXD_W0_VALID, 0);
                rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0);
                rt2x00_desc_write(entry_priv->desc, 0, word);
@@ -1266,18 +1266,18 @@ static void rt2500pci_write_tx_desc(struct queue_entry *entry,
        /*
         * Start writing the descriptor words.
         */
-       rt2x00_desc_read(txd, 1, &word);
+       word = rt2x00_desc_read(txd, 1);
        rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma);
        rt2x00_desc_write(txd, 1, word);
 
-       rt2x00_desc_read(txd, 2, &word);
+       word = rt2x00_desc_read(txd, 2);
        rt2x00_set_field32(&word, TXD_W2_IV_OFFSET, IEEE80211_HEADER);
        rt2x00_set_field32(&word, TXD_W2_AIFS, entry->queue->aifs);
        rt2x00_set_field32(&word, TXD_W2_CWMIN, entry->queue->cw_min);
        rt2x00_set_field32(&word, TXD_W2_CWMAX, entry->queue->cw_max);
        rt2x00_desc_write(txd, 2, word);
 
-       rt2x00_desc_read(txd, 3, &word);
+       word = rt2x00_desc_read(txd, 3);
        rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL, txdesc->u.plcp.signal);
        rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE, txdesc->u.plcp.service);
        rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW,
@@ -1286,7 +1286,7 @@ static void rt2500pci_write_tx_desc(struct queue_entry *entry,
                           txdesc->u.plcp.length_high);
        rt2x00_desc_write(txd, 3, word);
 
-       rt2x00_desc_read(txd, 10, &word);
+       word = rt2x00_desc_read(txd, 10);
        rt2x00_set_field32(&word, TXD_W10_RTS,
                           test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags));
        rt2x00_desc_write(txd, 10, word);
@@ -1296,7 +1296,7 @@ static void rt2500pci_write_tx_desc(struct queue_entry *entry,
         * the device, whereby the device may take hold of the TXD before we
         * finished updating it.
         */
-       rt2x00_desc_read(txd, 0, &word);
+       word = rt2x00_desc_read(txd, 0);
        rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1);
        rt2x00_set_field32(&word, TXD_W0_VALID, 1);
        rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
@@ -1371,8 +1371,8 @@ static void rt2500pci_fill_rxdone(struct queue_entry *entry,
        u32 word0;
        u32 word2;
 
-       rt2x00_desc_read(entry_priv->desc, 0, &word0);
-       rt2x00_desc_read(entry_priv->desc, 2, &word2);
+       word0 = rt2x00_desc_read(entry_priv->desc, 0);
+       word2 = rt2x00_desc_read(entry_priv->desc, 2);
 
        if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
                rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
@@ -1413,7 +1413,7 @@ static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev,
        while (!rt2x00queue_empty(queue)) {
                entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
                entry_priv = entry->priv_data;
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
 
                if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) ||
                    !rt2x00_get_field32(word, TXD_W0_VALID))
index 4497385a4fea3961c04a60118c1ab0c9d4da6670..529e05999abbbb9307d6e08b90e6127bb1ff6965 100644 (file)
@@ -1074,7 +1074,7 @@ static void rt2500usb_write_tx_desc(struct queue_entry *entry,
        /*
         * Start writing the descriptor words.
         */
-       rt2x00_desc_read(txd, 0, &word);
+       word = rt2x00_desc_read(txd, 0);
        rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
        rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
                           test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
@@ -1092,14 +1092,14 @@ static void rt2500usb_write_tx_desc(struct queue_entry *entry,
        rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
        rt2x00_desc_write(txd, 0, word);
 
-       rt2x00_desc_read(txd, 1, &word);
+       word = rt2x00_desc_read(txd, 1);
        rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
        rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
        rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
        rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
        rt2x00_desc_write(txd, 1, word);
 
-       rt2x00_desc_read(txd, 2, &word);
+       word = rt2x00_desc_read(txd, 2);
        rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
        rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
        rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
@@ -1247,8 +1247,8 @@ static void rt2500usb_fill_rxdone(struct queue_entry *entry,
        /*
         * It is now safe to read the descriptor on all architectures.
         */
-       rt2x00_desc_read(rxd, 0, &word0);
-       rt2x00_desc_read(rxd, 1, &word1);
+       word0 = rt2x00_desc_read(rxd, 0);
+       word1 = rt2x00_desc_read(rxd, 1);
 
        if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
                rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
@@ -1260,8 +1260,8 @@ static void rt2500usb_fill_rxdone(struct queue_entry *entry,
                rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
 
        if (rxdesc->cipher != CIPHER_NONE) {
-               _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
-               _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
+               rxdesc->iv[0] = _rt2x00_desc_read(rxd, 2);
+               rxdesc->iv[1] = _rt2x00_desc_read(rxd, 3);
                rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
 
                /* ICV is located at the end of frame */
index 5063169b7794c76a69503f4be1b45ed8174d6d84..6e2e760d98b1b94ce03c7bb74fd034e6e0c9b693 100644 (file)
@@ -785,7 +785,7 @@ void rt2800_write_tx_data(struct queue_entry *entry,
        /*
         * Initialize TX Info descriptor
         */
-       rt2x00_desc_read(txwi, 0, &word);
+       word = rt2x00_desc_read(txwi, 0);
        rt2x00_set_field32(&word, TXWI_W0_FRAG,
                           test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
        rt2x00_set_field32(&word, TXWI_W0_MIMO_PS,
@@ -807,7 +807,7 @@ void rt2800_write_tx_data(struct queue_entry *entry,
        rt2x00_set_field32(&word, TXWI_W0_PHYMODE, txdesc->rate_mode);
        rt2x00_desc_write(txwi, 0, word);
 
-       rt2x00_desc_read(txwi, 1, &word);
+       word = rt2x00_desc_read(txwi, 1);
        rt2x00_set_field32(&word, TXWI_W1_ACK,
                           test_bit(ENTRY_TXD_ACK, &txdesc->flags));
        rt2x00_set_field32(&word, TXWI_W1_NSEQ,
@@ -885,12 +885,12 @@ void rt2800_process_rxwi(struct queue_entry *entry,
        __le32 *rxwi = (__le32 *) entry->skb->data;
        u32 word;
 
-       rt2x00_desc_read(rxwi, 0, &word);
+       word = rt2x00_desc_read(rxwi, 0);
 
        rxdesc->cipher = rt2x00_get_field32(word, RXWI_W0_UDF);
        rxdesc->size = rt2x00_get_field32(word, RXWI_W0_MPDU_TOTAL_BYTE_COUNT);
 
-       rt2x00_desc_read(rxwi, 1, &word);
+       word = rt2x00_desc_read(rxwi, 1);
 
        if (rt2x00_get_field32(word, RXWI_W1_SHORT_GI))
                rxdesc->enc_flags |= RX_ENC_FLAG_SHORT_GI;
@@ -911,7 +911,7 @@ void rt2800_process_rxwi(struct queue_entry *entry,
        if (rxdesc->rate_mode == RATE_MODE_CCK)
                rxdesc->signal &= ~0x8;
 
-       rt2x00_desc_read(rxwi, 2, &word);
+       word = rt2x00_desc_read(rxwi, 2);
 
        /*
         * Convert descriptor AGC value to RSSI value.
@@ -972,7 +972,7 @@ void rt2800_txdone_entry(struct queue_entry *entry, u32 status, __le32 *txwi,
         * Obtain the status about this packet.
         */
        txdesc.flags = 0;
-       rt2x00_desc_read(txwi, 0, &word);
+       word = rt2x00_desc_read(txwi, 0);
 
        mcs = rt2x00_get_field32(word, TXWI_W0_MCS);
        ampdu = rt2x00_get_field32(word, TXWI_W0_AMPDU);
index 70ad20691bff2be9c2adcd248f1dd92fe1649183..ee5276e233fa6d926b4881ef487f1188fc0ffe0e 100644 (file)
@@ -109,7 +109,7 @@ void rt2800mmio_fill_rxdone(struct queue_entry *entry,
        __le32 *rxd = entry_priv->desc;
        u32 word;
 
-       rt2x00_desc_read(rxd, 3, &word);
+       word = rt2x00_desc_read(rxd, 3);
 
        if (rt2x00_get_field32(word, RXD_W3_CRC_ERROR))
                rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
@@ -175,7 +175,7 @@ static bool rt2800mmio_txdone_entry_check(struct queue_entry *entry, u32 status)
        wcid = rt2x00_get_field32(status, TX_STA_FIFO_WCID);
 
        txwi = rt2800_drv_get_txwi(entry);
-       rt2x00_desc_read(txwi, 1, &word);
+       word = rt2x00_desc_read(txwi, 1);
        tx_wcid = rt2x00_get_field32(word, TXWI_W1_WIRELESS_CLI_ID);
 
        return (tx_wcid == wcid);
@@ -696,11 +696,11 @@ bool rt2800mmio_get_entry_state(struct queue_entry *entry)
        u32 word;
 
        if (entry->queue->qid == QID_RX) {
-               rt2x00_desc_read(entry_priv->desc, 1, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 1);
 
                return (!rt2x00_get_field32(word, RXD_W1_DMA_DONE));
        } else {
-               rt2x00_desc_read(entry_priv->desc, 1, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 1);
 
                return (!rt2x00_get_field32(word, TXD_W1_DMA_DONE));
        }
@@ -715,11 +715,11 @@ void rt2800mmio_clear_entry(struct queue_entry *entry)
        u32 word;
 
        if (entry->queue->qid == QID_RX) {
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
                rt2x00_set_field32(&word, RXD_W0_SDP0, skbdesc->skb_dma);
                rt2x00_desc_write(entry_priv->desc, 0, word);
 
-               rt2x00_desc_read(entry_priv->desc, 1, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 1);
                rt2x00_set_field32(&word, RXD_W1_DMA_DONE, 0);
                rt2x00_desc_write(entry_priv->desc, 1, word);
 
@@ -730,7 +730,7 @@ void rt2800mmio_clear_entry(struct queue_entry *entry)
                rt2x00mmio_register_write(rt2x00dev, RX_CRX_IDX,
                                          entry->entry_idx);
        } else {
-               rt2x00_desc_read(entry_priv->desc, 1, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 1);
                rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 1);
                rt2x00_desc_write(entry_priv->desc, 1, word);
        }
index 75555f8069050a52ab191f88682e88a899da32fe..04a7debddb64fd56fafbf2ddaa4e64377b3dfe60 100644 (file)
@@ -456,7 +456,7 @@ static void rt2800usb_write_tx_desc(struct queue_entry *entry,
        /*
         * Initialize TXINFO descriptor
         */
-       rt2x00_desc_read(txi, 0, &word);
+       word = rt2x00_desc_read(txi, 0);
 
        /*
         * The size of TXINFO_W0_USB_DMA_TX_PKT_LEN is
@@ -527,7 +527,7 @@ static bool rt2800usb_txdone_entry_check(struct queue_entry *entry, u32 reg)
         */
        txwi = rt2800usb_get_txwi(entry);
 
-       rt2x00_desc_read(txwi, 1, &word);
+       word = rt2x00_desc_read(txwi, 1);
        tx_wcid = rt2x00_get_field32(word, TXWI_W1_WIRELESS_CLI_ID);
        tx_ack  = rt2x00_get_field32(word, TXWI_W1_ACK);
        tx_pid  = rt2x00_get_field32(word, TXWI_W1_PACKETID);
@@ -652,7 +652,7 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
         * | RXINFO | RXWI | header | L2 pad | payload | pad | RXD | USB pad |
         *          |<------------ rx_pkt_len -------------->|
         */
-       rt2x00_desc_read(rxi, 0, &word);
+       word = rt2x00_desc_read(rxi, 0);
        rx_pkt_len = rt2x00_get_field32(word, RXINFO_W0_USB_DMA_RX_PKT_LEN);
 
        /*
@@ -676,7 +676,7 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
        /*
         * It is now safe to read the descriptor on all architectures.
         */
-       rt2x00_desc_read(rxd, 0, &word);
+       word = rt2x00_desc_read(rxd, 0);
 
        if (rt2x00_get_field32(word, RXD_W0_CRC_ERROR))
                rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
index 6055f36211b95fcd9dde9d5bb3fb8d981f8cd7a8..a15bae29917b96f1f8f2413ff9122fdb924b6676 100644 (file)
@@ -642,11 +642,10 @@ static inline int rt2x00queue_dma_timeout(struct queue_entry *entry)
  * _rt2x00_desc_read - Read a word from the hardware descriptor.
  * @desc: Base descriptor address
  * @word: Word index from where the descriptor should be read.
- * @value: Address where the descriptor value should be written into.
  */
-static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
+static inline __le32 _rt2x00_desc_read(__le32 *desc, const u8 word)
 {
-       *value = desc[word];
+       return desc[word];
 }
 
 /**
@@ -654,13 +653,10 @@ static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
  * function will take care of the byte ordering.
  * @desc: Base descriptor address
  * @word: Word index from where the descriptor should be read.
- * @value: Address where the descriptor value should be written into.
  */
-static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
+static inline u32 rt2x00_desc_read(__le32 *desc, const u8 word)
 {
-       __le32 tmp;
-       _rt2x00_desc_read(desc, word, &tmp);
-       *value = le32_to_cpu(tmp);
+       return le32_to_cpu(_rt2x00_desc_read(desc, word));
 }
 
 /**
index d5b8051466b4b7b207654a91fb49cbc6354c64d7..234310200759328ab674a2bc4e45ed20353bdc9d 100644 (file)
@@ -1386,11 +1386,11 @@ static bool rt61pci_get_entry_state(struct queue_entry *entry)
        u32 word;
 
        if (entry->queue->qid == QID_RX) {
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
 
                return rt2x00_get_field32(word, RXD_W0_OWNER_NIC);
        } else {
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
 
                return (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) ||
                        rt2x00_get_field32(word, TXD_W0_VALID));
@@ -1404,16 +1404,16 @@ static void rt61pci_clear_entry(struct queue_entry *entry)
        u32 word;
 
        if (entry->queue->qid == QID_RX) {
-               rt2x00_desc_read(entry_priv->desc, 5, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 5);
                rt2x00_set_field32(&word, RXD_W5_BUFFER_PHYSICAL_ADDRESS,
                                   skbdesc->skb_dma);
                rt2x00_desc_write(entry_priv->desc, 5, word);
 
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
                rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1);
                rt2x00_desc_write(entry_priv->desc, 0, word);
        } else {
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
                rt2x00_set_field32(&word, TXD_W0_VALID, 0);
                rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0);
                rt2x00_desc_write(entry_priv->desc, 0, word);
@@ -1879,7 +1879,7 @@ static void rt61pci_write_tx_desc(struct queue_entry *entry,
        /*
         * Start writing the descriptor words.
         */
-       rt2x00_desc_read(txd, 1, &word);
+       word = rt2x00_desc_read(txd, 1);
        rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, entry->queue->qid);
        rt2x00_set_field32(&word, TXD_W1_AIFSN, entry->queue->aifs);
        rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
@@ -1890,7 +1890,7 @@ static void rt61pci_write_tx_desc(struct queue_entry *entry,
        rt2x00_set_field32(&word, TXD_W1_BUFFER_COUNT, 1);
        rt2x00_desc_write(txd, 1, word);
 
-       rt2x00_desc_read(txd, 2, &word);
+       word = rt2x00_desc_read(txd, 2);
        rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
        rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
        rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
@@ -1904,7 +1904,7 @@ static void rt61pci_write_tx_desc(struct queue_entry *entry,
                _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
        }
 
-       rt2x00_desc_read(txd, 5, &word);
+       word = rt2x00_desc_read(txd, 5);
        rt2x00_set_field32(&word, TXD_W5_PID_TYPE, entry->queue->qid);
        rt2x00_set_field32(&word, TXD_W5_PID_SUBTYPE, entry->entry_idx);
        rt2x00_set_field32(&word, TXD_W5_TX_POWER,
@@ -1913,12 +1913,12 @@ static void rt61pci_write_tx_desc(struct queue_entry *entry,
        rt2x00_desc_write(txd, 5, word);
 
        if (entry->queue->qid != QID_BEACON) {
-               rt2x00_desc_read(txd, 6, &word);
+               word = rt2x00_desc_read(txd, 6);
                rt2x00_set_field32(&word, TXD_W6_BUFFER_PHYSICAL_ADDRESS,
                                   skbdesc->skb_dma);
                rt2x00_desc_write(txd, 6, word);
 
-               rt2x00_desc_read(txd, 11, &word);
+               word = rt2x00_desc_read(txd, 11);
                rt2x00_set_field32(&word, TXD_W11_BUFFER_LENGTH0,
                                   txdesc->length);
                rt2x00_desc_write(txd, 11, word);
@@ -1929,7 +1929,7 @@ static void rt61pci_write_tx_desc(struct queue_entry *entry,
         * the device, whereby the device may take hold of the TXD before we
         * finished updating it.
         */
-       rt2x00_desc_read(txd, 0, &word);
+       word = rt2x00_desc_read(txd, 0);
        rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1);
        rt2x00_set_field32(&word, TXD_W0_VALID, 1);
        rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
@@ -2095,8 +2095,8 @@ static void rt61pci_fill_rxdone(struct queue_entry *entry,
        u32 word0;
        u32 word1;
 
-       rt2x00_desc_read(entry_priv->desc, 0, &word0);
-       rt2x00_desc_read(entry_priv->desc, 1, &word1);
+       word0 = rt2x00_desc_read(entry_priv->desc, 0);
+       word1 = rt2x00_desc_read(entry_priv->desc, 1);
 
        if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
                rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
@@ -2105,11 +2105,11 @@ static void rt61pci_fill_rxdone(struct queue_entry *entry,
        rxdesc->cipher_status = rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR);
 
        if (rxdesc->cipher != CIPHER_NONE) {
-               _rt2x00_desc_read(entry_priv->desc, 2, &rxdesc->iv[0]);
-               _rt2x00_desc_read(entry_priv->desc, 3, &rxdesc->iv[1]);
+               rxdesc->iv[0] = _rt2x00_desc_read(entry_priv->desc, 2);
+               rxdesc->iv[1] = _rt2x00_desc_read(entry_priv->desc, 3);
                rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
 
-               _rt2x00_desc_read(entry_priv->desc, 4, &rxdesc->icv);
+               rxdesc->icv = _rt2x00_desc_read(entry_priv->desc, 4);
                rxdesc->dev_flags |= RXDONE_CRYPTO_ICV;
 
                /*
@@ -2198,7 +2198,7 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev)
 
                entry = &queue->entries[index];
                entry_priv = entry->priv_data;
-               rt2x00_desc_read(entry_priv->desc, 0, &word);
+               word = rt2x00_desc_read(entry_priv->desc, 0);
 
                if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) ||
                    !rt2x00_get_field32(word, TXD_W0_VALID))
index b736982c012649b71a353f3db9dbc06097218101..fd913222abd1a013bdabbb47ebadbc1f648b9169 100644 (file)
@@ -1462,7 +1462,7 @@ static void rt73usb_write_tx_desc(struct queue_entry *entry,
        /*
         * Start writing the descriptor words.
         */
-       rt2x00_desc_read(txd, 0, &word);
+       word = rt2x00_desc_read(txd, 0);
        rt2x00_set_field32(&word, TXD_W0_BURST,
                           test_bit(ENTRY_TXD_BURST, &txdesc->flags));
        rt2x00_set_field32(&word, TXD_W0_VALID, 1);
@@ -1488,7 +1488,7 @@ static void rt73usb_write_tx_desc(struct queue_entry *entry,
        rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, txdesc->cipher);
        rt2x00_desc_write(txd, 0, word);
 
-       rt2x00_desc_read(txd, 1, &word);
+       word = rt2x00_desc_read(txd, 1);
        rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, entry->queue->qid);
        rt2x00_set_field32(&word, TXD_W1_AIFSN, entry->queue->aifs);
        rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
@@ -1498,7 +1498,7 @@ static void rt73usb_write_tx_desc(struct queue_entry *entry,
                           test_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags));
        rt2x00_desc_write(txd, 1, word);
 
-       rt2x00_desc_read(txd, 2, &word);
+       word = rt2x00_desc_read(txd, 2);
        rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
        rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
        rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
@@ -1512,7 +1512,7 @@ static void rt73usb_write_tx_desc(struct queue_entry *entry,
                _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
        }
 
-       rt2x00_desc_read(txd, 5, &word);
+       word = rt2x00_desc_read(txd, 5);
        rt2x00_set_field32(&word, TXD_W5_TX_POWER,
                           TXPOWER_TO_DEV(entry->queue->rt2x00dev->tx_power));
        rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
@@ -1694,8 +1694,8 @@ static void rt73usb_fill_rxdone(struct queue_entry *entry,
        /*
         * It is now safe to read the descriptor on all architectures.
         */
-       rt2x00_desc_read(rxd, 0, &word0);
-       rt2x00_desc_read(rxd, 1, &word1);
+       word0 = rt2x00_desc_read(rxd, 0);
+       word1 = rt2x00_desc_read(rxd, 1);
 
        if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
                rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
@@ -1704,11 +1704,11 @@ static void rt73usb_fill_rxdone(struct queue_entry *entry,
        rxdesc->cipher_status = rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR);
 
        if (rxdesc->cipher != CIPHER_NONE) {
-               _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
-               _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
+               rxdesc->iv[0] = _rt2x00_desc_read(rxd, 2);
+               rxdesc->iv[1] = _rt2x00_desc_read(rxd, 3);
                rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
 
-               _rt2x00_desc_read(rxd, 4, &rxdesc->icv);
+               rxdesc->icv = _rt2x00_desc_read(rxd, 4);
                rxdesc->dev_flags |= RXDONE_CRYPTO_ICV;
 
                /*