ARM: 7450/1: dcache: select DCACHE_WORD_ACCESS for little-endian ARMv6+ CPUs
authorWill Deacon <will.deacon@arm.com>
Fri, 6 Jul 2012 14:46:08 +0000 (15:46 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 9 Jul 2012 16:41:11 +0000 (17:41 +0100)
DCACHE_WORD_ACCESS uses the word-at-a-time API for optimised string
comparisons in the vfs layer.

This patch implements support for load_unaligned_zeropad for ARM CPUs
with native support for unaligned memory accesses (v6+) when running
little-endian.

Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/Kconfig
arch/arm/include/asm/word-at-a-time.h

index 574561a66d752e232ad14a516d6f857bbda73cde..acd12efe6f3e133ff9f8f5bc37cddff7d546e634 100644 (file)
@@ -48,6 +48,7 @@ config ARM
        select GENERIC_CLOCKEVENTS_BROADCAST if SMP
        select GENERIC_STRNCPY_FROM_USER
        select GENERIC_STRNLEN_USER
+       select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN
        help
          The ARM series is a line of low-power-consumption RISC chip designs
          licensed by ARM Ltd and targeted at embedded applications and
index 74b2d45785778f01a2bd93c444fc44648f5cf6cc..4d52f92967a65a09e57d5e02595bcf8ff3af2351 100644 (file)
@@ -48,6 +48,47 @@ static inline unsigned long find_zero(unsigned long mask)
        return ret;
 }
 
+#ifdef CONFIG_DCACHE_WORD_ACCESS
+
+#define zero_bytemask(mask) (mask)
+
+/*
+ * Load an unaligned word from kernel space.
+ *
+ * In the (very unlikely) case of the word being a page-crosser
+ * and the next page not being mapped, take the exception and
+ * return zeroes in the non-existing part.
+ */
+static inline unsigned long load_unaligned_zeropad(const void *addr)
+{
+       unsigned long ret, offset;
+
+       /* Load word from unaligned pointer addr */
+       asm(
+       "1:     ldr     %0, [%2]\n"
+       "2:\n"
+       "       .pushsection .fixup,\"ax\"\n"
+       "       .align 2\n"
+       "3:     and     %1, %2, #0x3\n"
+       "       bic     %2, %2, #0x3\n"
+       "       ldr     %0, [%2]\n"
+       "       lsl     %1, %1, #0x3\n"
+       "       lsr     %0, %0, %1\n"
+       "       b       2b\n"
+       "       .popsection\n"
+       "       .pushsection __ex_table,\"a\"\n"
+       "       .align  3\n"
+       "       .long   1b, 3b\n"
+       "       .popsection"
+       : "=&r" (ret), "=&r" (offset)
+       : "r" (addr), "Qo" (*(unsigned long *)addr));
+
+       return ret;
+}
+
+
+#endif /* DCACHE_WORD_ACCESS */
+
 #else  /* __ARMEB__ */
 #include <asm-generic/word-at-a-time.h>
 #endif