bool ee_to_ao;/*ee cec hw module mv to ao;ao cec delete*/
};
+struct cec_wakeup_t {
+ unsigned int wk_logic_addr:8;
+ unsigned int wk_phy_addr:16;
+ unsigned int wk_port_id:8;
+};
+
/* global struct for tx and rx */
struct ao_cec_dev {
unsigned long dev_type;
spinlock_t cec_reg_lock;
struct mutex cec_mutex;
struct mutex cec_ioctl_mutex;
+ struct cec_wakeup_t wakup_data;
+ unsigned int wakeup_reason;
#ifdef CONFIG_PM
int cec_suspend;
#endif
static bool wake_ok = 1;
static bool ee_cec;
static bool pin_status;
-static bool cec_msg_dbg_en;
+bool cec_msg_dbg_en;
#define CEC_ERR(format, args...) \
{if (cec_dev->dbg_dev) \
static unsigned char msg_log_buf[128] = { 0 };
+static void cec_hw_reset(void);
+
#define waiting_aocec_free(r) \
do {\
unsigned long cnt = 0;\
while (readl(cec_dev->cec_reg + r) & (1<<23)) {\
if (cnt++ == 3500) { \
pr_info("waiting aocec %x free time out\n", r);\
+ cec_hw_reset();\
break;\
} \
} \
unsigned int data32;
unsigned long flags;
- waiting_aocec_free(AO_CEC_RW_REG);
spin_lock_irqsave(&cec_dev->cec_reg_lock, flags);
+ waiting_aocec_free(AO_CEC_RW_REG);
data32 = 0;
data32 |= 0 << 16; /* [16] cec_reg_wr */
data32 |= 0 << 8; /* [15:8] cec_reg_wrdata */
unsigned long data32;
unsigned long flags;
- waiting_aocec_free(AO_CEC_RW_REG);
spin_lock_irqsave(&cec_dev->cec_reg_lock, flags);
+ waiting_aocec_free(AO_CEC_RW_REG);
data32 = 0;
data32 |= 1 << 16; /* [16] cec_reg_wr */
data32 |= data << 8; /* [15:8] cec_reg_wrdata */
cec_arbit_bit_time_set(7, 0x2aa, 0);
CEC_INFO("hw reset :logical addr:0x%x\n",
- aocec_rd_reg(CEC_LOGICAL_ADDR0));
+ aocec_rd_reg(CEC_LOGICAL_ADDR0));
}
void cec_rx_buf_clear(void)
}
cec_timeout_cnt = 0;
return 0;
+ } else {
+ CEC_ERR("error msg sts:0x%x\n", reg);
}
return -1;
}
if (cec_dev->dev_type == DEV_TYPE_PLAYBACK) {
tmp = tx_hpd;
return sprintf(buf, "%x\n", tmp);
+ } else {
+ tmp = hdmirx_rd_top(TOP_HPD_PWR5V);
+ CEC_INFO("TOP_HPD_PWR5V:%x\n", tmp);
+ tmp >>= 20;
+ tmp &= 0xf;
+ tmp |= (tx_hpd << 16);
+ return sprintf(buf, "%x\n", tmp);
}
-
- tmp = hdmirx_rd_top(TOP_HPD_PWR5V);
- CEC_INFO("TOP_HPD_PWR5V:%x\n", tmp);
- tmp >>= 20;
- tmp &= 0xf;
- tmp |= (tx_hpd << 16);
- return sprintf(buf, "%x\n", tmp);
}
static ssize_t pin_status_show(struct class *cla,
if (kstrtouint(buf, 16, &addr) != 0)
return -EINVAL;
+
if (addr > 0xffff || addr < 0) {
CEC_ERR("invalid input:%s\n", buf);
phy_addr_test = 0;
static ssize_t cec_version_show(struct class *cla,
struct class_attribute *attr, char *buf)
{
+ CEC_INFO("driver date:%s\n", CEC_DRIVER_VERSION);
return sprintf(buf, "%d\n", cec_dev->cec_info.cec_version);
}
if (!a && cec_dev->dev_type == DEV_TYPE_TUNER)
tmp = tx_hpd;
else { /* mixed for rx */
- tmp = (hdmirx_rd_top(TOP_HPD_PWR5V) >> 20);
+ tmp = hdmirx_get_connect_info();
if (tmp & (1 << (a - 1)))
tmp = 1;
else
cec_enable_arc_pin(arg);
break;
+ case CEC_IOC_GET_BOOT_ADDR:
+ tmp = (cec_dev->wakup_data.wk_logic_addr << 16) |
+ cec_dev->wakup_data.wk_phy_addr;
+ CEC_ERR("Boot addr:%#x\n", (unsigned int)tmp);
+ if (copy_to_user(argp, &tmp, _IOC_SIZE(cmd)))
+ return -EINVAL;
+ break;
+
+ case CEC_IOC_GET_BOOT_REASON:
+ tmp = cec_dev->wakeup_reason;
+ CEC_ERR("Boot reason:%#x\n", (unsigned int)tmp);
+ if (copy_to_user(argp, &tmp, _IOC_SIZE(cmd)))
+ return -EINVAL;
+ break;
+
default:
+ CEC_ERR("error ioctrl\n");
break;
}
mutex_unlock(&cec_dev->cec_ioctl_mutex);
ret = -ENOMEM;
goto tag_cec_devm_err;
}
- CEC_ERR("cec driver date:%s\n", CEC_DRIVER_VERSION);
cec_dev->dev_type = DEV_TYPE_PLAYBACK;
cec_dev->dbg_dev = &pdev->dev;
cec_dev->tx_dev = get_hdmitx_device();
ee_cec = 1;
else
ee_cec = 0;
- CEC_INFO("using cec:%d\n", ee_cec);
+ CEC_ERR("using EE cec:%d\n", ee_cec);
/* pinmux set */
if (of_get_property(node, "pinctrl-names", NULL)) {
if (r) {
/* default set to 2.0 */
CEC_INFO("not find cec_version\n");
- cec_dev->cec_info.cec_version = CEC_VERSION_20;
+ cec_dev->cec_info.cec_version = CEC_VERSION_14A;
}
/* irq set */
if (!r && !ee_cec) {
r = request_irq(irq_idx, &cec_isr_handler, IRQF_SHARED,
irq_name, (void *)cec_dev);
+ if (r < 0)
+ CEC_INFO("aocec irq request fail\n");
}
if (!r && ee_cec) {
r = request_irq(irq_idx, &cecrx_isr, IRQF_SHARED,
irq_name, (void *)cec_dev);
+ if (r < 0)
+ CEC_INFO("cecb irq request fail\n");
}
}
#endif
/* for init */
cec_pre_init();
queue_delayed_work(cec_dev->cec_thread, &cec_dev->cec_work, 0);
-
+ CEC_ERR("cec driver date:%s\n", CEC_DRIVER_VERSION);
+ CEC_ERR("boot:%#x;%#x\n", *((unsigned int *)&cec_dev->wakup_data),
+ cec_dev->wakeup_reason);
CEC_ERR("%s success end\n", __func__);
-
return 0;
+
tag_cec_msg_alloc_err:
input_free_device(cec_dev->cec_info.remote_cec_dev);
tag_cec_alloc_input_err:
#ifndef __AO_CEC_H__
#define __AO_CEC_H__
-#define CEC_DRIVER_VERSION "2018/05/15\n"
+#define CEC_DRIVER_VERSION "2018/06/13\n"
#define CEC_FRAME_DELAY msecs_to_jiffies(400)
#define CEC_DEV_NAME "cec"
#define ONE_TOUCH_STANDBY_MASK 2
#define AUTO_POWER_ON_MASK 3
-
#define AO_BASE 0xc8100000
#define AO_GPIO_I ((0x0A << 2))
#define AO_DEBUG_REG1 ((0x29 << 2))
#define AO_DEBUG_REG2 ((0x2a << 2))
#define AO_DEBUG_REG3 ((0x2b << 2))
+/* for new add after g12a/b ...*/
#define AO_CEC_STICKY_DATA0 ((0xca << 2))
#define AO_CEC_STICKY_DATA1 ((0xcb << 2))
#define AO_CEC_STICKY_DATA2 ((0xcc << 2))
#define HHI_32K_CLK_CNTL (0x89 << 2)
-#ifdef CONFIG_AMLOGIC_AO_CEC
-unsigned int aocec_rd_reg(unsigned long addr);
-void aocec_wr_reg(unsigned long addr, unsigned long data);
-void cecrx_irq_handle(void);
-void cec_logicaddr_set(int l_add);
-void cec_arbit_bit_time_set(unsigned int bit_set,
- unsigned int time_set, unsigned int flag);
-void cec_irq_enable(bool enable);
-void aocec_irq_enable(bool enable);
-#endif
+
+
#ifdef CONFIG_AMLOGIC_MEDIA_TVIN_HDMI
extern unsigned long hdmirx_rd_top(unsigned long addr);
}
#endif
+extern int hdmirx_get_connect_info(void);
+int __attribute__((weak))hdmirx_get_connect_info(void)
+{
+ return 0;
+}
+
+#ifdef CONFIG_AMLOGIC_AO_CEC
+unsigned int aocec_rd_reg(unsigned long addr);
+void aocec_wr_reg(unsigned long addr, unsigned long data);
+void cecrx_irq_handle(void);
+void cec_logicaddr_set(int l_add);
+void cec_arbit_bit_time_set(unsigned int bit_set,
+ unsigned int time_set, unsigned int flag);
+void cec_irq_enable(bool enable);
+void aocec_irq_enable(bool enable);
+#endif
+
#endif /* __AO_CEC_H__ */
#define CEC_DISPLAY_DEVICE (CEC_TV | CEC_FREE_USE)
#define CEC_RECORDING_DEVICE (CEC_RECORDING_DEVICE_1 | \
- CEC_RECORDING_DEVICE_2 | \
- CEC_RECORDING_DEVICE_3)
+ CEC_RECORDING_DEVICE_2 | \
+ CEC_RECORDING_DEVICE_3)
#define CEC_PLAYBACK_DEVICE (CEC_PLAYBACK_DEVICE_1 | \
- CEC_PLAYBACK_DEVICE_2 | \
- CEC_PLAYBACK_DEVICE_3)
+ CEC_PLAYBACK_DEVICE_2 | \
+ CEC_PLAYBACK_DEVICE_3)
#define CEC_TUNER_DEVICE (CEC_TUNER_1 | CEC_TUNER_2 | \
- CEC_TUNER_3 | CEC_TUNER_4)
+ CEC_TUNER_3 | CEC_TUNER_4)
#define CEC_AUDIO_SYSTEM_DEVICE (CEC_AUDIO_SYSTEM)
#define CEC_IOC_MAGIC 'C'
#define CEC_IOC_SET_DEV_TYPE _IOW(CEC_IOC_MAGIC, 0x0D, uint32_t)
#define CEC_IOC_SET_ARC_ENABLE _IOW(CEC_IOC_MAGIC, 0x0E, uint32_t)
#define CEC_IOC_SET_AUTO_DEVICE_OFF _IOW(CEC_IOC_MAGIC, 0x0F, uint32_t)
+#define CEC_IOC_GET_BOOT_ADDR _IOW(CEC_IOC_MAGIC, 0x10, uint32_t)
+#define CEC_IOC_GET_BOOT_REASON _IOW(CEC_IOC_MAGIC, 0x11, uint32_t)
enum hdmi_port_type {
HDMI_INPUT = 0,