#define EHCI_IAA_MSECS 10 /* arbitrary */
#define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
#define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
-#define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
+#define EHCI_SHRINK_FRAMES 5 /* async qh unlink delay */
/* Initial IRQ latency: faster than hw default */
static int log2_irq_thresh = 0; // 0 to 6
struct ehci_qh *qh;
enum ehci_timer_action action = TIMER_IO_WATCHDOG;
- if (!++(ehci->stamp))
- ehci->stamp++;
+ ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
timer_action_done (ehci, TIMER_ASYNC_SHRINK);
rescan:
qh = ehci->async->qh_next.qh;
}
}
- /* unlink idle entries, reducing HC PCI usage as well
+ /* unlink idle entries, reducing DMA usage as well
* as HCD schedule-scanning costs. delay for any qh
* we just scanned, there's a not-unusual case that it
* doesn't stay idle for long.
* (plus, avoids some kind of re-activation race.)
*/
- if (list_empty (&qh->qtd_list)) {
- if (qh->stamp == ehci->stamp)
+ if (list_empty(&qh->qtd_list)
+ && qh->qh_state == QH_STATE_LINKED) {
+ if (!ehci->reclaim
+ && ((ehci->stamp - qh->stamp) & 0x1fff)
+ >= (EHCI_SHRINK_FRAMES * 8))
+ start_unlink_async(ehci, qh);
+ else
action = TIMER_ASYNC_SHRINK;
- else if (!ehci->reclaim
- && qh->qh_state == QH_STATE_LINKED)
- start_unlink_async (ehci, qh);
}
qh = qh->qh_next.qh;
break;
// case TIMER_ASYNC_SHRINK:
default:
- t = EHCI_SHRINK_JIFFIES;
+ /* add a jiffie since we synch against the
+ * 8 KHz uframe counter.
+ */
+ t = DIV_ROUND_UP(EHCI_SHRINK_FRAMES * HZ, 1000) + 1;
break;
}
mod_timer(&ehci->watchdog, t + jiffies);