net: ethernet: mediatek: get the chip id by ETHDMASYS registers
authorNelson Chang <nelson.chang@mediatek.com>
Thu, 6 Oct 2016 11:44:01 +0000 (19:44 +0800)
committerDavid S. Miller <davem@davemloft.net>
Fri, 7 Oct 2016 01:08:07 +0000 (21:08 -0400)
The driver gets the chip id by ETHSYS_CHIPID0_3/ETHSYS_CHIPID4_7 registers
in mtk_probe().

Signed-off-by: Nelson Chang <nelson.chang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mediatek/mtk_eth_soc.c
drivers/net/ethernet/mediatek/mtk_eth_soc.h

index ad4ab979507b94989e7a1cf318aa2d96ba32135d..0c67ab1fb4d88d942615bc9ff3c0e7862c82dfde 100644 (file)
@@ -2323,6 +2323,31 @@ free_netdev:
        return err;
 }
 
+static int mtk_get_chip_id(struct mtk_eth *eth, u32 *chip_id)
+{
+       u32 val[2], id[4];
+
+       regmap_read(eth->ethsys, ETHSYS_CHIPID0_3, &val[0]);
+       regmap_read(eth->ethsys, ETHSYS_CHIPID4_7, &val[1]);
+
+       id[3] = ((val[0] >> 16) & 0xff) - '0';
+       id[2] = ((val[0] >> 24) & 0xff) - '0';
+       id[1] = (val[1] & 0xff) - '0';
+       id[0] = ((val[1] >> 8) & 0xff) - '0';
+
+       *chip_id = (id[3] * 1000) + (id[2] * 100) +
+                  (id[1] * 10) + id[0];
+
+       if (!(*chip_id)) {
+               dev_err(eth->dev, "failed to get chip id\n");
+               return -ENODEV;
+       }
+
+       dev_info(eth->dev, "chip id = %d\n", *chip_id);
+
+       return 0;
+}
+
 static int mtk_probe(struct platform_device *pdev)
 {
        struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -2388,6 +2413,10 @@ static int mtk_probe(struct platform_device *pdev)
        if (err)
                return err;
 
+       err = mtk_get_chip_id(eth, &eth->chip_id);
+       if (err)
+               return err;
+
        for_each_child_of_node(pdev->dev.of_node, mac_np) {
                if (!of_device_is_compatible(mac_np,
                                             "mediatek,eth-mac"))
index 30031959d6de28e09d4c5c7cf339085070dbbe1a..a5b422b37f80e9fea5c9c36738d790b0613d29fc 100644 (file)
 #define GPIO_BIAS_CTRL         0xed0
 #define GPIO_DRV_SEL10         0xf00
 
+/* ethernet subsystem chip id register */
+#define ETHSYS_CHIPID0_3       0x0
+#define ETHSYS_CHIPID4_7       0x4
+
 /* ethernet subsystem config register */
 #define ETHSYS_SYSCFG0         0x14
 #define SYSCFG0_GE_MASK                0x3
@@ -534,6 +538,7 @@ struct mtk_eth {
        unsigned long                   sysclk;
        struct regmap                   *ethsys;
        struct regmap                   *pctl;
+       u32                             chip_id;
        bool                            hwlro;
        atomic_t                        dma_refcnt;
        struct mtk_tx_ring              tx_ring;