irqchip: gic: Use mask field in GICC_IAR
authorHaojian Zhuang <haojian.zhuang@linaro.org>
Sun, 11 May 2014 08:05:58 +0000 (16:05 +0800)
committerJason Cooper <jason@lakedaemon.net>
Mon, 19 May 2014 00:35:23 +0000 (00:35 +0000)
Bit[9:0] is interrupt ID field in GICC_IAR. Bit[12:10] is CPU ID field,
and others are reserved.

So we should use GICC_IAR_INT_ID_MASK to get interrupt ID. It's not a good way
to use ~0x1c00 (CPU ID field) to get interrupt ID.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Link: https://lkml.kernel.org/r/1399795571-17231-3-git-send-email-haojian.zhuang@linaro.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
drivers/irqchip/irq-gic.c
include/linux/irqchip/arm-gic.h

index 4300b6606f5e3276c11656ff29506b665e9a2a87..f711fb6af7a915cbbd41f65b021b2966346cb803 100644 (file)
@@ -287,7 +287,7 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
 
        do {
                irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
-               irqnr = irqstat & ~0x1c00;
+               irqnr = irqstat & GICC_IAR_INT_ID_MASK;
 
                if (likely(irqnr > 15 && irqnr < 1021)) {
                        irqnr = irq_find_mapping(gic->domain, irqnr);
index 7ed92d0560d59de9f4db4eab3d9940312807c417..45e2d8c15bd211d0fa15473efc4e1f3f8c6f17e3 100644 (file)
@@ -21,6 +21,8 @@
 #define GIC_CPU_ACTIVEPRIO             0xd0
 #define GIC_CPU_IDENT                  0xfc
 
+#define GICC_IAR_INT_ID_MASK           0x3ff
+
 #define GIC_DIST_CTRL                  0x000
 #define GIC_DIST_CTR                   0x004
 #define GIC_DIST_IGROUP                        0x080