ath9k: Add power save wrappers and modularize hw_pll handler
authorSenthil Balasubramanian <senthilkumar@atheros.com>
Fri, 22 Apr 2011 06:02:12 +0000 (11:32 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 25 Apr 2011 18:50:19 +0000 (14:50 -0400)
We should protect hw_pll handler with power save wrappers and
also modularize hw_pll handler properly for better readability.

Also add a debug message to track chip resets on pll hang condition.

Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/hw.c
drivers/net/wireless/ath/ath9k/hw.h
drivers/net/wireless/ath/ath9k/main.c

index 6166ba0bca54bb10e7763676cc2ced5c26ecd315..2b4e7c0225ab503942a433a659057f2d492e5d08 100644 (file)
@@ -673,7 +673,7 @@ static void ath9k_hw_init_qos(struct ath_hw *ah)
        REGWRITE_BUFFER_FLUSH(ah);
 }
 
-unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
+u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
 {
        REG_CLR_BIT(ah, PLL3, PLL3_DO_MEAS_MASK);
        udelay(100);
index 29a745c59e637b730e879994f2264e703155f1b5..6a028bd67116359b5624cf074bfecf193f292f43 100644 (file)
@@ -932,7 +932,7 @@ void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
 void ath9k_hw_reset_tsf(struct ath_hw *ah);
 void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);
 void ath9k_hw_init_global_settings(struct ath_hw *ah);
-unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
+u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
 void ath9k_hw_set11nmac2040(struct ath_hw *ah);
 void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period);
 void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
index 94d73c3f44583981a5ca8a588c68c465f38cb9f9..20a2cf731d8397ebf3e10d01f8b08d39b88c2c5c 100644 (file)
@@ -624,23 +624,37 @@ out:
        ath9k_ps_restore(sc);
 }
 
+static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
+{
+       static int count;
+       struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+
+       if (pll_sqsum >= 0x40000) {
+               count++;
+               if (count == 3) {
+                       /* Rx is hung for more than 500ms. Reset it */
+                       ath_dbg(common, ATH_DBG_RESET,
+                               "Possible RX hang, resetting");
+                       ath_reset(sc, true);
+                       count = 0;
+               }
+       } else
+               count = 0;
+}
+
 void ath_hw_pll_work(struct work_struct *work)
 {
        struct ath_softc *sc = container_of(work, struct ath_softc,
                                            hw_pll_work.work);
-       static int count;
+       u32 pll_sqsum;
 
        if (AR_SREV_9485(sc->sc_ah)) {
-               if (ar9003_get_pll_sqsum_dvc(sc->sc_ah) >= 0x40000) {
-                       count++;
 
-                       if (count == 3) {
-                               /* Rx is hung for more than 500ms. Reset it */
-                               ath_reset(sc, true);
-                               count = 0;
-                       }
-               } else
-                       count = 0;
+               ath9k_ps_wakeup(sc);
+               pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
+               ath9k_ps_restore(sc);
+
+               ath_hw_pll_rx_hang_check(sc, pll_sqsum);
 
                ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
        }