drm/nouveau/disp/dp: create subclass for dp outputs
authorBen Skeggs <bskeggs@redhat.com>
Sat, 17 May 2014 01:19:54 +0000 (11:19 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Wed, 11 Jun 2014 06:10:43 +0000 (16:10 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
16 files changed:
drivers/gpu/drm/nouveau/Makefile
drivers/gpu/drm/nouveau/core/engine/disp/gm107.c
drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
drivers/gpu/drm/nouveau/core/engine/disp/nv50.h
drivers/gpu/drm/nouveau/core/engine/disp/nv84.c
drivers/gpu/drm/nouveau/core/engine/disp/nv94.c
drivers/gpu/drm/nouveau/core/engine/disp/nva0.c
drivers/gpu/drm/nouveau/core/engine/disp/nva3.c
drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c
drivers/gpu/drm/nouveau/core/engine/disp/nve0.c
drivers/gpu/drm/nouveau/core/engine/disp/nvf0.c
drivers/gpu/drm/nouveau/core/engine/disp/outpdp.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/engine/disp/outpdp.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/engine/disp/piornv50.c
drivers/gpu/drm/nouveau/core/engine/disp/sornv94.c
drivers/gpu/drm/nouveau/core/engine/disp/sornvd0.c

index de2eada522a086df1df66272c55329a7b4332a28..2b6156d0e4b5abb985a65a7ad321ddc4053a08f9 100644 (file)
@@ -224,6 +224,7 @@ nouveau-y += core/engine/device/gm100.o
 nouveau-y += core/engine/disp/base.o
 nouveau-y += core/engine/disp/conn.o
 nouveau-y += core/engine/disp/outp.o
+nouveau-y += core/engine/disp/outpdp.o
 nouveau-y += core/engine/disp/nv04.o
 nouveau-y += core/engine/disp/nv50.o
 nouveau-y += core/engine/disp/nv84.o
index cf6f59677b74291c328e5a4d826e7566504e11c2..a5b0ad6d3bfab6004650d28ca992d9265f0ad2cd 100644 (file)
@@ -94,6 +94,7 @@ gm107_disp_oclass = &(struct nv50_disp_impl) {
                .init = _nouveau_disp_init,
                .fini = _nouveau_disp_fini,
        },
+       .base.outp =  nvd0_disp_outp_sclass,
        .mthd.core = &nve0_disp_mast_mthd_chan,
        .mthd.base = &nvd0_disp_sync_mthd_chan,
        .mthd.ovly = &nve0_disp_ovly_mthd_chan,
index 2956c131cbd92b0661963af9d2b52a5513819791..bba9d4d1d0105b4cddb848479dc95d586765bf42 100644 (file)
@@ -1660,6 +1660,12 @@ nv50_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        return 0;
 }
 
+struct nouveau_oclass *
+nv50_disp_outp_sclass[] = {
+       &nv50_pior_dp_impl.base.base,
+       NULL
+};
+
 struct nouveau_oclass *
 nv50_disp_oclass = &(struct nv50_disp_impl) {
        .base.base.handle = NV_ENGINE(DISP, 0x50),
@@ -1669,6 +1675,7 @@ nv50_disp_oclass = &(struct nv50_disp_impl) {
                .init = _nouveau_disp_init,
                .fini = _nouveau_disp_fini,
        },
+       .base.outp =  nv50_disp_outp_sclass,
        .mthd.core = &nv50_disp_mast_mthd_chan,
        .mthd.base = &nv50_disp_sync_mthd_chan,
        .mthd.ovly = &nv50_disp_ovly_mthd_chan,
index 24cb180f73f061236f718d9a34146cdc48cbc4ce..d5468a61f5e0902078149b15dc2d024975cfcc3e 100644 (file)
@@ -12,6 +12,7 @@
 #include "dport.h"
 #include "priv.h"
 #include "outp.h"
+#include "outpdp.h"
 
 struct nv50_disp_impl {
        struct nouveau_disp_impl base;
@@ -200,4 +201,13 @@ void nvd0_disp_intr(struct nouveau_subdev *);
 extern const struct nv50_disp_mthd_chan nve0_disp_mast_mthd_chan;
 extern const struct nv50_disp_mthd_chan nve0_disp_ovly_mthd_chan;
 
+extern struct nvkm_output_dp_impl nv50_pior_dp_impl;
+extern struct nouveau_oclass *nv50_disp_outp_sclass[];
+
+extern struct nvkm_output_dp_impl nv94_sor_dp_impl;
+extern struct nouveau_oclass *nv94_disp_outp_sclass[];
+
+extern struct nvkm_output_dp_impl nvd0_sor_dp_impl;
+extern struct nouveau_oclass *nvd0_disp_outp_sclass[];
+
 #endif
index 98c5b19bc2b06d25643bd904905cc834ef7b8661..436f0a5eb46dc09e2be7c1717d6c8862e6a3f059 100644 (file)
@@ -277,6 +277,7 @@ nv84_disp_oclass = &(struct nv50_disp_impl) {
                .init = _nouveau_disp_init,
                .fini = _nouveau_disp_fini,
        },
+       .base.outp =  nv50_disp_outp_sclass,
        .mthd.core = &nv84_disp_mast_mthd_chan,
        .mthd.base = &nv84_disp_sync_mthd_chan,
        .mthd.ovly = &nv84_disp_ovly_mthd_chan,
index 6844061c7e0450afc2de82c1d4e6aa111ebab6b5..14f53143b81b2bd9584d45f4cea6f9350fa3dd91 100644 (file)
@@ -128,6 +128,13 @@ nv94_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        return 0;
 }
 
+struct nouveau_oclass *
+nv94_disp_outp_sclass[] = {
+       &nv50_pior_dp_impl.base.base,
+       &nv94_sor_dp_impl.base.base,
+       NULL
+};
+
 struct nouveau_oclass *
 nv94_disp_oclass = &(struct nv50_disp_impl) {
        .base.base.handle = NV_ENGINE(DISP, 0x88),
@@ -137,6 +144,7 @@ nv94_disp_oclass = &(struct nv50_disp_impl) {
                .init = _nouveau_disp_init,
                .fini = _nouveau_disp_fini,
        },
+       .base.outp =  nv94_disp_outp_sclass,
        .mthd.core = &nv94_disp_mast_mthd_chan,
        .mthd.base = &nv84_disp_sync_mthd_chan,
        .mthd.ovly = &nv84_disp_ovly_mthd_chan,
index 88c96241c02a1a2fba69c67c3acadaffb5d498dc..b8926200baa751e460720eb9c9bec6e2ffa9e66c 100644 (file)
@@ -139,6 +139,7 @@ nva0_disp_oclass = &(struct nv50_disp_impl) {
                .init = _nouveau_disp_init,
                .fini = _nouveau_disp_fini,
        },
+       .base.outp =  nv50_disp_outp_sclass,
        .mthd.core = &nv84_disp_mast_mthd_chan,
        .mthd.base = &nv84_disp_sync_mthd_chan,
        .mthd.ovly = &nva0_disp_ovly_mthd_chan,
index 46cb2ce0e82a99a8995a6e24bb33dd3c55284780..aae561ff838a328d8d81a7bb69c8a16da321f608 100644 (file)
@@ -111,6 +111,7 @@ nva3_disp_oclass = &(struct nv50_disp_impl) {
                .init = _nouveau_disp_init,
                .fini = _nouveau_disp_fini,
        },
+       .base.outp =  nv94_disp_outp_sclass,
        .mthd.core = &nv94_disp_mast_mthd_chan,
        .mthd.base = &nv84_disp_sync_mthd_chan,
        .mthd.ovly = &nv84_disp_ovly_mthd_chan,
index 7bf54e81275be1ad95db9450e93ffeacf1983843..e5f5e425e3e23c3562d7ee7b70dce2a74a9cdae9 100644 (file)
@@ -1356,6 +1356,12 @@ nvd0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        return 0;
 }
 
+struct nouveau_oclass *
+nvd0_disp_outp_sclass[] = {
+       &nvd0_sor_dp_impl.base.base,
+       NULL
+};
+
 struct nouveau_oclass *
 nvd0_disp_oclass = &(struct nv50_disp_impl) {
        .base.base.handle = NV_ENGINE(DISP, 0x90),
@@ -1365,6 +1371,7 @@ nvd0_disp_oclass = &(struct nv50_disp_impl) {
                .init = _nouveau_disp_init,
                .fini = _nouveau_disp_fini,
        },
+       .base.outp =  nvd0_disp_outp_sclass,
        .mthd.core = &nvd0_disp_mast_mthd_chan,
        .mthd.base = &nvd0_disp_sync_mthd_chan,
        .mthd.ovly = &nvd0_disp_ovly_mthd_chan,
index 44e0b8f34c1a8fc8d15fa019598be533e87df713..90f79be94bd79c66fb05ae5fbb2a42ba0f5c3c7c 100644 (file)
@@ -259,6 +259,7 @@ nve0_disp_oclass = &(struct nv50_disp_impl) {
                .init = _nouveau_disp_init,
                .fini = _nouveau_disp_fini,
        },
+       .base.outp =  nvd0_disp_outp_sclass,
        .mthd.core = &nve0_disp_mast_mthd_chan,
        .mthd.base = &nvd0_disp_sync_mthd_chan,
        .mthd.ovly = &nve0_disp_ovly_mthd_chan,
index 482585d375fa564ec2ff4e1bcbb7b87e2b15efe8..25a18dffcb44e9bd0cc5b29f60004134fafcc8d1 100644 (file)
@@ -94,6 +94,7 @@ nvf0_disp_oclass = &(struct nv50_disp_impl) {
                .init = _nouveau_disp_init,
                .fini = _nouveau_disp_fini,
        },
+       .base.outp =  nvd0_disp_outp_sclass,
        .mthd.core = &nve0_disp_mast_mthd_chan,
        .mthd.base = &nvd0_disp_sync_mthd_chan,
        .mthd.ovly = &nve0_disp_ovly_mthd_chan,
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/outpdp.c b/drivers/gpu/drm/nouveau/core/engine/disp/outpdp.c
new file mode 100644 (file)
index 0000000..ea6483d
--- /dev/null
@@ -0,0 +1,144 @@
+/*
+ * Copyright 2014 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <subdev/i2c.h>
+
+#include "outpdp.h"
+#include "conn.h"
+
+static int
+nvkm_output_dp_service(void *data, u32 type, int index)
+{
+       struct nvkm_output_dp *outp = data;
+       DBG("IRQ: %d\n", type);
+       return NVKM_EVENT_KEEP;
+}
+
+static int
+nvkm_output_dp_hotplug(void *data, u32 type, int index)
+{
+       struct nvkm_output_dp *outp = data;
+       DBG("HPD: %d\n", type);
+       return NVKM_EVENT_KEEP;
+}
+
+int
+_nvkm_output_dp_fini(struct nouveau_object *object, bool suspend)
+{
+       struct nvkm_output_dp *outp = (void *)object;
+       nouveau_event_put(outp->irq);
+       return nvkm_output_fini(&outp->base, suspend);
+}
+
+int
+_nvkm_output_dp_init(struct nouveau_object *object)
+{
+       struct nvkm_output_dp *outp = (void *)object;
+       return nvkm_output_init(&outp->base);
+}
+
+void
+_nvkm_output_dp_dtor(struct nouveau_object *object)
+{
+       struct nvkm_output_dp *outp = (void *)object;
+       nouveau_event_ref(NULL, &outp->irq);
+       nvkm_output_destroy(&outp->base);
+}
+
+int
+nvkm_output_dp_create_(struct nouveau_object *parent,
+                      struct nouveau_object *engine,
+                      struct nouveau_oclass *oclass,
+                      struct dcb_output *info, int index,
+                      int length, void **pobject)
+{
+       struct nouveau_bios *bios = nouveau_bios(parent);
+       struct nouveau_i2c *i2c = nouveau_i2c(parent);
+       struct nvkm_output_dp *outp;
+       u8  hdr, cnt, len;
+       u32 data;
+       int ret;
+
+       ret = nvkm_output_create_(parent, engine, oclass, info, index,
+                                 length, pobject);
+       outp = *pobject;
+       if (ret)
+               return ret;
+
+       nouveau_event_ref(NULL, &outp->base.conn->hpd.event);
+
+       /* access to the aux channel is not optional... */
+       if (!outp->base.edid) {
+               ERR("aux channel not found\n");
+               return -ENODEV;
+       }
+
+       /* nor is the bios data for this output... */
+       data = nvbios_dpout_match(bios, outp->base.info.hasht,
+                                 outp->base.info.hashm, &outp->version,
+                                 &hdr, &cnt, &len, &outp->info);
+       if (!data) {
+               ERR("no bios dp data\n");
+               return -ENODEV;
+       }
+
+       DBG("bios dp %02x %02x %02x %02x\n", outp->version, hdr, cnt, len);
+
+       /* link maintenance */
+       ret = nouveau_event_new(i2c->ntfy, NVKM_I2C_IRQ, outp->base.edid->index,
+                               nvkm_output_dp_service, outp, &outp->irq);
+       if (ret) {
+               ERR("error monitoring aux irq event: %d\n", ret);
+               return ret;
+       }
+
+       /* hotplug detect, replaces gpio-based mechanism with aux events */
+       ret = nouveau_event_new(i2c->ntfy, NVKM_I2C_PLUG | NVKM_I2C_UNPLUG,
+                               outp->base.edid->index,
+                               nvkm_output_dp_hotplug, outp,
+                              &outp->base.conn->hpd.event);
+       if (ret) {
+               ERR("error monitoring aux hpd events: %d\n", ret);
+               return ret;
+       }
+
+       return 0;
+}
+
+int
+_nvkm_output_dp_ctor(struct nouveau_object *parent,
+                    struct nouveau_object *engine,
+                    struct nouveau_oclass *oclass, void *info, u32 index,
+                    struct nouveau_object **pobject)
+{
+       struct nvkm_output_dp *outp;
+       int ret;
+
+       ret = nvkm_output_dp_create(parent, engine, oclass, info, index, &outp);
+       *pobject = nv_object(outp);
+       if (ret)
+               return ret;
+
+       return 0;
+}
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/outpdp.h b/drivers/gpu/drm/nouveau/core/engine/disp/outpdp.h
new file mode 100644 (file)
index 0000000..22f692d
--- /dev/null
@@ -0,0 +1,49 @@
+#ifndef __NVKM_DISP_OUTP_DP_H__
+#define __NVKM_DISP_OUTP_DP_H__
+
+#include <subdev/bios.h>
+#include <subdev/bios/dp.h>
+
+#include "outp.h"
+
+struct nvkm_output_dp {
+       struct nvkm_output base;
+
+       struct nvbios_dpout info;
+       u8 version;
+
+       struct nouveau_eventh *irq;
+       struct nouveau_eventh *hpd;
+};
+
+#define nvkm_output_dp_create(p,e,c,b,i,d)                                     \
+       nvkm_output_dp_create_((p), (e), (c), (b), (i), sizeof(**d), (void **)d)
+#define nvkm_output_dp_destroy(d) ({                                           \
+       struct nvkm_output_dp *_outp = (d);                                    \
+       _nvkm_output_dp_dtor(nv_object(_outp));                                \
+})
+#define nvkm_output_dp_init(d) ({                                              \
+       struct nvkm_output_dp *_outp = (d);                                    \
+       _nvkm_output_dp_init(nv_object(_outp));                                \
+})
+#define nvkm_output_dp_fini(d,s) ({                                            \
+       struct nvkm_output_dp *_outp = (d);                                    \
+       _nvkm_output_dp_fini(nv_object(_outp), (s));                           \
+})
+
+int nvkm_output_dp_create_(struct nouveau_object *, struct nouveau_object *,
+                          struct nouveau_oclass *, struct dcb_output *,
+                          int, int, void **);
+
+int  _nvkm_output_dp_ctor(struct nouveau_object *, struct nouveau_object *,
+                         struct nouveau_oclass *, void *, u32,
+                         struct nouveau_object **);
+void _nvkm_output_dp_dtor(struct nouveau_object *);
+int  _nvkm_output_dp_init(struct nouveau_object *);
+int  _nvkm_output_dp_fini(struct nouveau_object *, bool);
+
+struct nvkm_output_dp_impl {
+       struct nvkm_output_impl base;
+};
+
+#endif
index c4d36edc3dfb2c40a0830a4761bd78270259db7f..2c1eacd8019a970f2f69e56ca6c165f161f63fd7 100644 (file)
@@ -141,26 +141,27 @@ nv50_pior_dp_ctor(struct nouveau_object *parent,
                  struct nouveau_object **pobject)
 {
        struct nouveau_i2c *i2c = nouveau_i2c(parent);
-       struct nvkm_output *outp;
+       struct nvkm_output_dp *outp;
        int ret;
 
-       ret = nvkm_output_create(parent, engine, oclass, info, index, &outp);
+       ret = nvkm_output_dp_create(parent, engine, oclass, info, index, &outp);
        *pobject = nv_object(outp);
        if (ret)
                return ret;
 
-       outp->edid = i2c->find_type(i2c, NV_I2C_TYPE_EXTAUX(outp->info.extdev));
+       outp->base.edid = i2c->find_type(i2c, NV_I2C_TYPE_EXTAUX(
+                                        outp->base.info.extdev));
        return 0;
 }
 
-struct nvkm_output_impl
+struct nvkm_output_dp_impl
 nv50_pior_dp_impl = {
-       .base.handle = DCB_OUTPUT_DP | 0x0100,
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.base.handle = DCB_OUTPUT_DP | 0x0010,
+       .base.base.ofuncs = &(struct nouveau_ofuncs) {
                .ctor = nv50_pior_dp_ctor,
-               .dtor = _nvkm_output_dtor,
-               .init = _nvkm_output_init,
-               .fini = _nvkm_output_fini,
+               .dtor = _nvkm_output_dp_dtor,
+               .init = _nvkm_output_dp_init,
+               .fini = _nvkm_output_dp_fini,
        },
 };
 
index eea3ef59693d6dd3158764690f3e82b8286ac022..ca551eabc1c9350072dcb7239cdf9d85bbcdf93e 100644 (file)
@@ -31,6 +31,7 @@
 #include <subdev/bios/init.h>
 
 #include "nv50.h"
+#include "outpdp.h"
 
 static inline u32
 nv94_sor_soff(struct dcb_output *outp)
@@ -129,3 +130,14 @@ nv94_sor_dp_func = {
        .lnk_ctl = nv94_sor_dp_lnk_ctl,
        .drv_ctl = nv94_sor_dp_drv_ctl,
 };
+
+struct nvkm_output_dp_impl
+nv94_sor_dp_impl = {
+       .base.base.handle = DCB_OUTPUT_DP,
+       .base.base.ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = _nvkm_output_dp_ctor,
+               .dtor = _nvkm_output_dp_dtor,
+               .init = _nvkm_output_dp_init,
+               .fini = _nvkm_output_dp_fini,
+       },
+};
index d2df572f16a3afda530f60a049daed4fac0bfbac..ffd4531d81bb3ffd345ace6768d1d071a6b42010 100644 (file)
@@ -126,3 +126,14 @@ nvd0_sor_dp_func = {
        .lnk_ctl = nvd0_sor_dp_lnk_ctl,
        .drv_ctl = nvd0_sor_dp_drv_ctl,
 };
+
+struct nvkm_output_dp_impl
+nvd0_sor_dp_impl = {
+       .base.base.handle = DCB_OUTPUT_DP,
+       .base.base.ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = _nvkm_output_dp_ctor,
+               .dtor = _nvkm_output_dp_dtor,
+               .init = _nvkm_output_dp_init,
+               .fini = _nvkm_output_dp_fini,
+       },
+};