return divider_u16 - 1;
}
+static unsigned long tegra_clk_fixed_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ return to_clk_tegra(hw)->fixed_rate;
+}
+
+struct clk_ops tegra_clk_32k_ops = {
+ .recalc_rate = tegra_clk_fixed_recalc_rate,
+};
+
/* clk_m functions */
static unsigned long tegra20_clk_m_recalc_rate(struct clk_hw *hw,
unsigned long prate)
return to_clk_tegra(hw)->fixed_rate;
}
-struct clk_ops tegra_clk_32k_ops = {
+struct clk_ops tegra30_clk_32k_ops = {
.recalc_rate = tegra30_clk_fixed_recalc_rate,
};
#ifndef __MACH_TEGRA30_CLOCK_H
#define __MACH_TEGRA30_CLOCK_H
-extern struct clk_ops tegra_clk_32k_ops;
+extern struct clk_ops tegra30_clk_32k_ops;
extern struct clk_ops tegra30_clk_m_ops;
extern struct clk_ops tegra_clk_m_div_ops;
extern struct clk_ops tegra_pll_ref_ops;
static struct clk tegra_clk_32k = {
.name = "clk_32k",
.hw = &tegra_clk_32k_hw.hw,
- .ops = &tegra_clk_32k_ops,
+ .ops = &tegra30_clk_32k_ops,
.flags = CLK_IS_ROOT,
};