clk: rockchip: add some critical clocks for rv1108 SoC
authorElaine Zhang <zhangqing@rock-chips.com>
Tue, 8 Aug 2017 07:19:33 +0000 (15:19 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Tue, 8 Aug 2017 15:28:57 +0000 (17:28 +0200)
the bus/periph/nclk_ddrupctl/pclk_ddrmon/pclk_acodecphy/pclk_pmu
no driver to handle them,
Chip design requirements for these clock to always on.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rv1108.c

index f907b67745e4fdb5270aeec6875dce1240f2af41..d1065dd9f442035fe1628f3d70cf6f3a759cdf61 100644 (file)
@@ -776,10 +776,16 @@ static struct rockchip_clk_branch rv1108_clk_branches[] __initdata = {
 
 static const char *const rv1108_critical_clocks[] __initconst = {
        "aclk_core",
-       "aclk_bus_src_gpll",
+       "aclk_bus",
+       "hclk_bus",
+       "pclk_bus",
        "aclk_periph",
        "hclk_periph",
        "pclk_periph",
+       "nclk_ddrupctl",
+       "pclk_ddrmon",
+       "pclk_acodecphy",
+       "pclk_pmu",
 };
 
 static void __init rv1108_clk_init(struct device_node *np)