dts: hisi: fixes no syscon fault when init mdio
authoryankejian <yankejian@huawei.com>
Wed, 13 Jan 2016 07:09:58 +0000 (15:09 +0800)
committerDavid S. Miller <davem@davemloft.net>
Fri, 15 Jan 2016 19:40:03 +0000 (14:40 -0500)
When linux start up, we get the log below:
"Hi-HNS_MDIO 803c0000.mdio: no syscon hisilicon,peri-c-subctrl
mdio_bus mdio@803c0000: mdio sys ctl reg has not maped"

The source code about the subctrl is dealt syscon, but dts doesn't.
It cause such fault, so this patch adds the syscon info on dts files to
fixes it.

Signed-off-by: Kejian Yan <yankejian@huawei.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
arch/arm64/boot/dts/hisilicon/hip05.dtsi
arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi

index 6ac7c000af2257ba16bc2101f4549c917a38025e..e3ccab114006dd67425b31510186f03704da563c 100644 (file)
@@ -187,6 +187,22 @@ Example:
                reg = <0xb0000000 0x10000>;
        };
 
+Hisilicon HiP05 PERISUB system controller
+
+Required properties:
+- compatible : "hisilicon,hip05-perisubc", "syscon";
+- reg : Register address and size
+
+The HiP05 PERISUB system controller is shared by peripheral controllers in
+HiP05 Soc to implement some basic configurations. The peripheral
+controllers include mdio, ddr, iic, uart, timer and so on.
+
+Example:
+       /* for HiP05 perisub-ctrl-c system */
+       peri_c_subctrl: syscon@80000000 {
+               compatible = "hisilicon,hip05-perisubc", "syscon";
+               reg = <0x0 0x80000000 0x0 0x10000>;
+       };
 -----------------------------------------------------------------------
 Hisilicon CPU controller
 
index 4ff16d016e346f6fc5e7155135e316e3592ba0ca..c1ea999c7be14cf2e1bd9a42e2397ecf2ea4c793 100644 (file)
                        clock-frequency = <200000000>;
                };
 
+               peri_c_subctrl: syscon@80000000 {
+                       compatible = "hisilicon,hip05-perisubc", "syscon";
+                       reg = < 0x0 0x80000000 0x0 0x10000>;
+               };
+
                uart0: uart@80300000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x0 0x80300000 0x0 0x10000>;
index 606dd5a05c2dfd5682c1343fd05a0ce33b2dd46a..da7b6e61325758c547b521c3df675adeb9568d2b 100644 (file)
@@ -10,8 +10,8 @@ soc0: soc@000000000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "hisilicon,hns-mdio";
-               reg = <0x0 0x803c0000 0x0 0x10000
-                      0x0 0x80000000 0x0 0x10000>;
+               reg = <0x0 0x803c0000 0x0 0x10000>;
+               subctrl-vbase = <&peri_c_subctrl>;
 
                soc0_phy0: ethernet-phy@0 {
                        reg = <0x0>;