drvdata->pcnoc_mport_clk = devm_clk_get(dev, "pcnoc-mport-clk");
if (IS_ERR(drvdata->pcnoc_mport_clk)) {
- dev_err(&pdev->dev, "%s() error getting pcnoc-mport-clk: %ld\n",
- __func__, PTR_ERR(drvdata->pcnoc_mport_clk));
+ dev_err(&pdev->dev, "error getting pcnoc-mport-clk: %ld\n",
+ PTR_ERR(drvdata->pcnoc_mport_clk));
return PTR_ERR(drvdata->pcnoc_mport_clk);
}
ret = clk_prepare_enable(drvdata->pcnoc_mport_clk);
if (ret) {
- dev_err(&pdev->dev, "%s() Error enabling pcnoc-mport-clk: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "Error enabling pcnoc-mport-clk: %d\n",
+ ret);
return ret;
}
drvdata->pcnoc_sway_clk = devm_clk_get(dev, "pcnoc-sway-clk");
if (IS_ERR(drvdata->pcnoc_sway_clk)) {
- dev_err(&pdev->dev, "%s() error getting pcnoc-sway-clk: %ld\n",
- __func__, PTR_ERR(drvdata->pcnoc_sway_clk));
+ dev_err(&pdev->dev, "error getting pcnoc-sway-clk: %ld\n",
+ PTR_ERR(drvdata->pcnoc_sway_clk));
return PTR_ERR(drvdata->pcnoc_sway_clk);
}
ret = clk_prepare_enable(drvdata->pcnoc_sway_clk);
if (ret) {
- dev_err(&pdev->dev, "%s() Error enabling pcnoc_sway_clk: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "Error enabling pcnoc_sway_clk: %d\n", ret);
return ret;
}
ret = clk_set_rate(drvdata->mi2s_osr_clk[dai->driver->id], freq);
if (ret)
- dev_err(dai->dev, "%s() error setting mi2s osrclk to %u: %d\n",
- __func__, freq, ret);
+ dev_err(dai->dev, "error setting mi2s osrclk to %u: %d\n",
+ freq, ret);
return ret;
}
ret = clk_prepare_enable(drvdata->mi2s_osr_clk[dai->driver->id]);
if (ret) {
- dev_err(dai->dev, "%s() error in enabling mi2s osr clk: %d\n",
- __func__, ret);
+ dev_err(dai->dev, "error in enabling mi2s osr clk: %d\n", ret);
return ret;
}
ret = clk_prepare_enable(drvdata->mi2s_bit_clk[dai->driver->id]);
if (ret) {
- dev_err(dai->dev, "%s() error in enabling mi2s bit clk: %d\n",
- __func__, ret);
+ dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret);
clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]);
return ret;
}
bitwidth = snd_pcm_format_width(format);
if (bitwidth < 0) {
- dev_err(dai->dev, "%s() invalid bit width given: %d\n",
- __func__, bitwidth);
+ dev_err(dai->dev, "invalid bit width given: %d\n", bitwidth);
return bitwidth;
}
regval |= LPAIF_I2SCTL_BITWIDTH_32;
break;
default:
- dev_err(dai->dev, "%s() invalid bitwidth given: %d\n",
- __func__, bitwidth);
+ dev_err(dai->dev, "invalid bitwidth given: %d\n", bitwidth);
return -EINVAL;
}
regval |= LPAIF_I2SCTL_SPKMONO_STEREO;
break;
default:
- dev_err(dai->dev, "%s() invalid channels given: %u\n",
- __func__, channels);
+ dev_err(dai->dev, "invalid channels given: %u\n",
+ channels);
return -EINVAL;
}
} else {
regval |= LPAIF_I2SCTL_MICMONO_STEREO;
break;
default:
- dev_err(dai->dev, "%s() invalid channels given: %u\n",
- __func__, channels);
+ dev_err(dai->dev, "invalid channels given: %u\n",
+ channels);
return -EINVAL;
}
}
LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id),
regval);
if (ret) {
- dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
- __func__, ret);
+ dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret);
return ret;
}
ret = clk_set_rate(drvdata->mi2s_bit_clk[dai->driver->id],
rate * bitwidth * 2);
if (ret) {
- dev_err(dai->dev, "%s() error setting mi2s bitclk to %u: %d\n",
- __func__, rate * bitwidth * 2, ret);
+ dev_err(dai->dev, "error setting mi2s bitclk to %u: %d\n",
+ rate * bitwidth * 2, ret);
return ret;
}
LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id),
0);
if (ret)
- dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
- __func__, ret);
+ dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret);
return ret;
}
LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id),
mask, val);
if (ret)
- dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
- __func__, ret);
+ dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret);
return ret;
}
dai->driver->id),
mask, val);
if (ret)
- dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
- __func__, ret);
+ dev_err(dai->dev, "error writing to i2sctl reg: %d\n",
+ ret);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
dai->driver->id),
mask, val);
if (ret)
- dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
- __func__, ret);
+ dev_err(dai->dev, "error writing to i2sctl reg: %d\n",
+ ret);
break;
}
ret = regmap_write(drvdata->lpaif_map,
LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), 0);
if (ret)
- dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
- __func__, ret);
+ dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret);
return ret;
}
dsp_of_node = of_parse_phandle(pdev->dev.of_node, "qcom,adsp", 0);
if (dsp_of_node) {
- dev_err(&pdev->dev, "%s() DSP exists and holds audio resources\n",
- __func__);
+ dev_err(&pdev->dev, "DSP exists and holds audio resources\n");
return -EBUSY;
}
drvdata->lpaif = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR((void const __force *)drvdata->lpaif)) {
- dev_err(&pdev->dev, "%s() error mapping reg resource: %ld\n",
- __func__,
+ dev_err(&pdev->dev, "error mapping reg resource: %ld\n",
PTR_ERR((void const __force *)drvdata->lpaif));
return PTR_ERR((void const __force *)drvdata->lpaif);
}
drvdata->lpaif_map = devm_regmap_init_mmio(&pdev->dev, drvdata->lpaif,
&lpass_cpu_regmap_config);
if (IS_ERR(drvdata->lpaif_map)) {
- dev_err(&pdev->dev, "%s() error initializing regmap: %ld\n",
- __func__, PTR_ERR(drvdata->lpaif_map));
+ dev_err(&pdev->dev, "error initializing regmap: %ld\n",
+ PTR_ERR(drvdata->lpaif_map));
return PTR_ERR(drvdata->lpaif_map);
}
clk_name);
if (IS_ERR(drvdata->mi2s_osr_clk[dai_id])) {
dev_warn(&pdev->dev,
- "%s() error getting optional mi2s-osr-clk: %ld\n",
- __func__,
+ "error getting optional mi2s-osr-clk: %ld\n",
PTR_ERR(drvdata->mi2s_osr_clk[dai_id]));
drvdata->mi2s_osr_clk[dai_id] = NULL;
clk_name);
if (IS_ERR(drvdata->mi2s_bit_clk[dai_id])) {
dev_err(&pdev->dev,
- "%s() error getting mi2s-bit-clk: %ld\n",
- __func__,
+ "error getting mi2s-bit-clk: %ld\n",
PTR_ERR(drvdata->mi2s_bit_clk[dai_id]));
return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]);
}
drvdata->ahbix_clk = devm_clk_get(&pdev->dev, "ahbix-clk");
if (IS_ERR(drvdata->ahbix_clk)) {
- dev_err(&pdev->dev, "%s() error getting ahbix-clk: %ld\n",
- __func__, PTR_ERR(drvdata->ahbix_clk));
+ dev_err(&pdev->dev, "error getting ahbix-clk: %ld\n",
+ PTR_ERR(drvdata->ahbix_clk));
return PTR_ERR(drvdata->ahbix_clk);
}
ret = clk_set_rate(drvdata->ahbix_clk, LPASS_AHBIX_CLOCK_FREQUENCY);
if (ret) {
- dev_err(&pdev->dev, "%s() error setting rate on ahbix_clk: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "error setting rate on ahbix_clk: %d\n",
+ ret);
return ret;
}
- dev_dbg(&pdev->dev, "%s() set ahbix_clk rate to %lu\n", __func__,
- clk_get_rate(drvdata->ahbix_clk));
+ dev_dbg(&pdev->dev, "set ahbix_clk rate to %lu\n",
+ clk_get_rate(drvdata->ahbix_clk));
ret = clk_prepare_enable(drvdata->ahbix_clk);
if (ret) {
- dev_err(&pdev->dev, "%s() error enabling ahbix_clk: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "error enabling ahbix_clk: %d\n", ret);
return ret;
}
variant->dai_driver,
variant->num_dai);
if (ret) {
- dev_err(&pdev->dev, "%s() error registering cpu driver: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "error registering cpu driver: %d\n", ret);
goto err_clk;
}
ret = asoc_qcom_lpass_platform_register(pdev);
if (ret) {
- dev_err(&pdev->dev, "%s() error registering platform driver: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "error registering platform driver: %d\n",
+ ret);
goto err_clk;
}
LPAIF_DMACTL_REG(v, dma_ch, dir), 0);
if (ret) {
dev_err(soc_runtime->dev,
- "%s() error writing to rdmactl reg: %d\n",
- __func__, ret);
+ "error writing to rdmactl reg: %d\n", ret);
return ret;
}
ret = snd_pcm_hw_constraint_integer(runtime,
SNDRV_PCM_HW_PARAM_PERIODS);
if (ret < 0) {
- dev_err(soc_runtime->dev, "%s() setting constraints failed: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev, "setting constraints failed: %d\n",
+ ret);
return -EINVAL;
}
bitwidth = snd_pcm_format_width(format);
if (bitwidth < 0) {
- dev_err(soc_runtime->dev, "%s() invalid bit width given: %d\n",
- __func__, bitwidth);
+ dev_err(soc_runtime->dev, "invalid bit width given: %d\n",
+ bitwidth);
return bitwidth;
}
regval |= LPAIF_DMACTL_WPSCNT_FOUR;
break;
default:
- dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n",
- __func__, bitwidth, channels);
+ dev_err(soc_runtime->dev,
+ "invalid PCM config given: bw=%d, ch=%u\n",
+ bitwidth, channels);
return -EINVAL;
}
break;
regval |= LPAIF_DMACTL_WPSCNT_EIGHT;
break;
default:
- dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n",
- __func__, bitwidth, channels);
+ dev_err(soc_runtime->dev,
+ "invalid PCM config given: bw=%d, ch=%u\n",
+ bitwidth, channels);
return -EINVAL;
}
break;
default:
- dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n",
- __func__, bitwidth, channels);
+ dev_err(soc_runtime->dev, "invalid PCM config given: bw=%d, ch=%u\n",
+ bitwidth, channels);
return -EINVAL;
}
ret = regmap_write(drvdata->lpaif_map,
LPAIF_DMACTL_REG(v, ch, dir), regval);
if (ret) {
- dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev, "error writing to rdmactl reg: %d\n",
+ ret);
return ret;
}
reg = LPAIF_DMACTL_REG(v, pcm_data->dma_ch, substream->stream);
ret = regmap_write(drvdata->lpaif_map, reg, 0);
if (ret)
- dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev, "error writing to rdmactl reg: %d\n",
+ ret);
return ret;
}
LPAIF_DMABASE_REG(v, ch, dir),
runtime->dma_addr);
if (ret) {
- dev_err(soc_runtime->dev, "%s() error writing to rdmabase reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev, "error writing to rdmabase reg: %d\n",
+ ret);
return ret;
}
LPAIF_DMABUFF_REG(v, ch, dir),
(snd_pcm_lib_buffer_bytes(substream) >> 2) - 1);
if (ret) {
- dev_err(soc_runtime->dev, "%s() error writing to rdmabuff reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev, "error writing to rdmabuff reg: %d\n",
+ ret);
return ret;
}
LPAIF_DMAPER_REG(v, ch, dir),
(snd_pcm_lib_period_bytes(substream) >> 2) - 1);
if (ret) {
- dev_err(soc_runtime->dev, "%s() error writing to rdmaper reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev, "error writing to rdmaper reg: %d\n",
+ ret);
return ret;
}
LPAIF_DMACTL_REG(v, ch, dir),
LPAIF_DMACTL_ENABLE_MASK, LPAIF_DMACTL_ENABLE_ON);
if (ret) {
- dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev, "error writing to rdmactl reg: %d\n",
+ ret);
return ret;
}
LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST),
LPAIF_IRQ_ALL(ch));
if (ret) {
- dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev,
+ "error writing to irqclear reg: %d\n", ret);
return ret;
}
LPAIF_IRQ_ALL(ch),
LPAIF_IRQ_ALL(ch));
if (ret) {
- dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev,
+ "error writing to irqen reg: %d\n", ret);
return ret;
}
LPAIF_DMACTL_ENABLE_MASK,
LPAIF_DMACTL_ENABLE_ON);
if (ret) {
- dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev,
+ "error writing to rdmactl reg: %d\n", ret);
return ret;
}
break;
LPAIF_DMACTL_ENABLE_MASK,
LPAIF_DMACTL_ENABLE_OFF);
if (ret) {
- dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev,
+ "error writing to rdmactl reg: %d\n", ret);
return ret;
}
LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST),
LPAIF_IRQ_ALL(ch), 0);
if (ret) {
- dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev,
+ "error writing to irqen reg: %d\n", ret);
return ret;
}
break;
ret = regmap_read(drvdata->lpaif_map,
LPAIF_DMABASE_REG(v, ch, dir), &base_addr);
if (ret) {
- dev_err(soc_runtime->dev, "%s() error reading from rdmabase reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev,
+ "error reading from rdmabase reg: %d\n", ret);
return ret;
}
ret = regmap_read(drvdata->lpaif_map,
LPAIF_DMACURR_REG(v, ch, dir), &curr_addr);
if (ret) {
- dev_err(soc_runtime->dev, "%s() error reading from rdmacurr reg: %d\n",
- __func__, ret);
+ dev_err(soc_runtime->dev,
+ "error reading from rdmacurr reg: %d\n", ret);
return ret;
}
LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST),
LPAIF_IRQ_PER(chan));
if (rv) {
- dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
- __func__, rv);
+ dev_err(soc_runtime->dev,
+ "error writing to irqclear reg: %d\n", rv);
return IRQ_NONE;
}
snd_pcm_period_elapsed(substream);
LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST),
LPAIF_IRQ_XRUN(chan));
if (rv) {
- dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
- __func__, rv);
+ dev_err(soc_runtime->dev,
+ "error writing to irqclear reg: %d\n", rv);
return IRQ_NONE;
}
- dev_warn(soc_runtime->dev, "%s() xrun warning\n", __func__);
+ dev_warn(soc_runtime->dev, "xrun warning\n");
snd_pcm_stop(substream, SNDRV_PCM_STATE_XRUN);
ret = IRQ_HANDLED;
}
LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST),
LPAIF_IRQ_ERR(chan));
if (rv) {
- dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
- __func__, rv);
+ dev_err(soc_runtime->dev,
+ "error writing to irqclear reg: %d\n", rv);
return IRQ_NONE;
}
- dev_err(soc_runtime->dev, "%s() bus access error\n", __func__);
+ dev_err(soc_runtime->dev, "bus access error\n");
snd_pcm_stop(substream, SNDRV_PCM_STATE_DISCONNECTED);
ret = IRQ_HANDLED;
}
rv = regmap_read(drvdata->lpaif_map,
LPAIF_IRQSTAT_REG(v, LPAIF_IRQ_PORT_HOST), &irqs);
if (rv) {
- pr_err("%s() error reading from irqstat reg: %d\n",
- __func__, rv);
+ pr_err("error reading from irqstat reg: %d\n", rv);
return IRQ_NONE;
}
drvdata->lpaif_irq = platform_get_irq_byname(pdev, "lpass-irq-lpaif");
if (drvdata->lpaif_irq < 0) {
- dev_err(&pdev->dev, "%s() error getting irq handle: %d\n",
- __func__, drvdata->lpaif_irq);
+ dev_err(&pdev->dev, "error getting irq handle: %d\n",
+ drvdata->lpaif_irq);
return -ENODEV;
}
ret = regmap_write(drvdata->lpaif_map,
LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), 0);
if (ret) {
- dev_err(&pdev->dev, "%s() error writing to irqen reg: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "error writing to irqen reg: %d\n", ret);
return ret;
}
lpass_platform_lpaif_irq, IRQF_TRIGGER_RISING,
"lpass-irq-lpaif", drvdata);
if (ret) {
- dev_err(&pdev->dev, "%s() irq request failed: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "irq request failed: %d\n", ret);
return ret;
}
bitwidth = snd_pcm_format_width(format);
if (bitwidth < 0) {
- dev_err(card->dev, "%s() invalid bit width given: %d\n",
- __func__, bitwidth);
+ dev_err(card->dev, "invalid bit width given: %d\n", bitwidth);
return bitwidth;
}
ret = snd_soc_dai_set_sysclk(soc_runtime->cpu_dai, 0, sysclk_freq, 0);
if (ret) {
- dev_err(card->dev, "%s() error setting sysclk to %u: %d\n",
- __func__, sysclk_freq, ret);
+ dev_err(card->dev, "error setting sysclk to %u: %d\n",
+ sysclk_freq, ret);
return ret;
}
dai_link->cpu_of_node = of_parse_phandle(np, "cpu", 0);
if (!dai_link->cpu_of_node) {
- dev_err(card->dev, "%s() error getting cpu phandle\n",
- __func__);
+ dev_err(card->dev, "error getting cpu phandle\n");
return -EINVAL;
}
dai_link->platform_of_node = dai_link->cpu_of_node;
dai_link->codec_of_node = of_parse_phandle(np, "codec", 0);
if (!dai_link->codec_of_node) {
- dev_err(card->dev, "%s() error getting codec phandle\n",
- __func__);
+ dev_err(card->dev, "error getting codec phandle\n");
return -EINVAL;
}
ret = snd_soc_of_parse_card_name(card, "qcom,model");
if (ret) {
- dev_err(&pdev->dev, "%s() error parsing card name: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "error parsing card name: %d\n", ret);
return ret;
}
ret = storm_parse_of(card);
if (ret) {
- dev_err(&pdev->dev, "%s() error resolving dai links: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "error resolving dai links: %d\n", ret);
return ret;
}
ret = devm_snd_soc_register_card(&pdev->dev, card);
if (ret)
- dev_err(&pdev->dev, "%s() error registering soundcard: %d\n",
- __func__, ret);
+ dev_err(&pdev->dev, "error registering soundcard: %d\n", ret);
return ret;