drm/i915: Also disable PSR on Sink when disabling it on Source.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Mon, 23 Nov 2015 22:19:32 +0000 (14:19 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 24 Nov 2015 12:33:50 +0000 (13:33 +0100)
It is not a bad idea to disable the PSR feature on Sink
when we are disabling on the Source.

v2: Move dpcd write inside mutex protected area as suggested by Sonika.

Cc: Sonika Jindal <sonika.jindal@intel.com>
Suggested-by: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_psr.c

index a02dd3015b91743d7fb89af41e871f71427bb6da..b6609e648f75ed765ce2c6bec8a934dc6829b0c2 100644 (file)
@@ -524,11 +524,15 @@ void intel_psr_disable(struct intel_dp *intel_dp)
                return;
        }
 
+       /* Disable PSR on Source */
        if (HAS_DDI(dev))
                hsw_psr_disable(intel_dp);
        else
                vlv_psr_disable(intel_dp);
 
+       /* Disable PSR on Sink */
+       drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
+
        dev_priv->psr.enabled = NULL;
        mutex_unlock(&dev_priv->psr.lock);