ARM: EXYNOS: add initial setup-i2c0 for EXYNOS5

In all of Samsung platform, the setup-i2c0.c file for I2C channel 0
is always compiled. So when supporting new SoC,it should be updated
for it. Since EXYNOS5 GPIO will be supported after this, there is no
setup gpio in there now. It will be implemented with that, of course.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 995e7cc02bec441bf775927a059781fc8afc04ce..2117f0257ef3fdc2ead0d46d92b23400d887f951 100644 (file)
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -52,7 +52,7 @@ obj-$(CONFIG_EXYNOS4_DEV_DWMCI)               += dev-dwmci.o
 obj-$(CONFIG_EXYNOS4_DEV_DMA)          += dma.o
 obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI)     += dev-ohci.o
 
-obj-$(CONFIG_ARCH_EXYNOS4)             += setup-i2c0.o
+obj-$(CONFIG_ARCH_EXYNOS)              += setup-i2c0.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMC)       += setup-fimc.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMD0)      += setup-fimd0.o
 obj-$(CONFIG_EXYNOS4_SETUP_I2C1)       += setup-i2c1.o

diff --git a/arch/arm/mach-exynos/setup-i2c0.c b/arch/arm/mach-exynos/setup-i2c0.c
index d395bd17c38becccd313a0ce22e6f0b3cc7ec415..b90d94c17f7cbc7af586304047dd07e0f58d0496 100644 (file)
--- a/arch/arm/mach-exynos/setup-i2c0.c
+++ b/arch/arm/mach-exynos/setup-i2c0.c
@@ -1,7 +1,5 @@
 /*
- * linux/arch/arm/mach-exynos4/setup-i2c0.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2009-2012 Samsung Electronics Co., Ltd.
  *             http://www.samsung.com/
  *
  * I2C0 GPIO configuration.
@@ -18,9 +16,14 @@ struct platform_device; /* don't need the contents */
 #include <linux/gpio.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
+#include <plat/cpu.h>
 
 void s3c_i2c0_cfg_gpio(struct platform_device *dev)
 {
+       if (soc_is_exynos5250())
+               /* will be implemented with gpio function */
+               return;
+
        s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2,
                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
 }