pinctrl: samsung: Validate alias coming from DT
authorKrzysztof Kozlowski <krzk@kernel.org>
Tue, 20 Feb 2018 18:17:51 +0000 (19:17 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 28 Mar 2018 16:24:34 +0000 (18:24 +0200)
commit 93b0beae721b3344923b4b8317e9d83b542f4ca6 upstream.

Driver uses alias from Device Tree as an index of pin controller data
array.  In case of a wrong DTB or an out-of-tree DTB, the alias could be
outside of this data array leading to out-of-bounds access.

Depending on binary and memory layout, this could be handled properly
(showing error like "samsung-pinctrl 3860000.pinctrl: driver data not
available") or could lead to exceptions.

Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: <stable@vger.kernel.org>
Fixes: 30574f0db1b1 ("pinctrl: add samsung pinctrl and gpiolib driver")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pinctrl/samsung/pinctrl-exynos-arm.c
drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
drivers/pinctrl/samsung/pinctrl-s3c24xx.c
drivers/pinctrl/samsung/pinctrl-s3c64xx.c
drivers/pinctrl/samsung/pinctrl-samsung.c
drivers/pinctrl/samsung/pinctrl-samsung.h

index 071084d3ee9c19606679ffcc280f8d7d8388ac1f..92aeea174a5673c61d95fde4aed610539cc113ea 100644 (file)
@@ -129,7 +129,7 @@ static const struct samsung_pin_bank_data s5pv210_pin_bank[] __initconst = {
        EXYNOS_PIN_BANK_EINTW(8, 0xc60, "gph3", 0x0c),
 };
 
-const struct samsung_pin_ctrl s5pv210_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl s5pv210_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 data */
                .pin_banks      = s5pv210_pin_bank,
@@ -142,6 +142,11 @@ const struct samsung_pin_ctrl s5pv210_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data s5pv210_of_data __initconst = {
+       .ctrl           = s5pv210_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(s5pv210_pin_ctrl),
+};
+
 /* Pad retention control code for accessing PMU regmap */
 static atomic_t exynos_shared_retention_refcnt;
 
@@ -204,7 +209,7 @@ static const struct samsung_retention_data exynos3250_retention_data __initconst
  * Samsung pinctrl driver data for Exynos3250 SoC. Exynos3250 SoC includes
  * two gpio/pin-mux/pinconfig controllers.
  */
-const struct samsung_pin_ctrl exynos3250_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl exynos3250_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 data */
                .pin_banks      = exynos3250_pin_banks0,
@@ -225,6 +230,11 @@ const struct samsung_pin_ctrl exynos3250_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data exynos3250_of_data __initconst = {
+       .ctrl           = exynos3250_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(exynos3250_pin_ctrl),
+};
+
 /* pin banks of exynos4210 pin-controller 0 */
 static const struct samsung_pin_bank_data exynos4210_pin_banks0[] __initconst = {
        EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
@@ -308,7 +318,7 @@ static const struct samsung_retention_data exynos4_audio_retention_data __initco
  * Samsung pinctrl driver data for Exynos4210 SoC. Exynos4210 SoC includes
  * three gpio/pin-mux/pinconfig controllers.
  */
-const struct samsung_pin_ctrl exynos4210_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl exynos4210_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 data */
                .pin_banks      = exynos4210_pin_banks0,
@@ -334,6 +344,11 @@ const struct samsung_pin_ctrl exynos4210_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data exynos4210_of_data __initconst = {
+       .ctrl           = exynos4210_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(exynos4210_pin_ctrl),
+};
+
 /* pin banks of exynos4x12 pin-controller 0 */
 static const struct samsung_pin_bank_data exynos4x12_pin_banks0[] __initconst = {
        EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
@@ -396,7 +411,7 @@ static const struct samsung_pin_bank_data exynos4x12_pin_banks3[] __initconst =
  * Samsung pinctrl driver data for Exynos4x12 SoC. Exynos4x12 SoC includes
  * four gpio/pin-mux/pinconfig controllers.
  */
-const struct samsung_pin_ctrl exynos4x12_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl exynos4x12_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 data */
                .pin_banks      = exynos4x12_pin_banks0,
@@ -432,6 +447,11 @@ const struct samsung_pin_ctrl exynos4x12_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data exynos4x12_of_data __initconst = {
+       .ctrl           = exynos4x12_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(exynos4x12_pin_ctrl),
+};
+
 /* pin banks of exynos5250 pin-controller 0 */
 static const struct samsung_pin_bank_data exynos5250_pin_banks0[] __initconst = {
        EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
@@ -492,7 +512,7 @@ static const struct samsung_pin_bank_data exynos5250_pin_banks3[] __initconst =
  * Samsung pinctrl driver data for Exynos5250 SoC. Exynos5250 SoC includes
  * four gpio/pin-mux/pinconfig controllers.
  */
-const struct samsung_pin_ctrl exynos5250_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl exynos5250_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 data */
                .pin_banks      = exynos5250_pin_banks0,
@@ -528,6 +548,11 @@ const struct samsung_pin_ctrl exynos5250_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data exynos5250_of_data __initconst = {
+       .ctrl           = exynos5250_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(exynos5250_pin_ctrl),
+};
+
 /* pin banks of exynos5260 pin-controller 0 */
 static const struct samsung_pin_bank_data exynos5260_pin_banks0[] __initconst = {
        EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpa0", 0x00),
@@ -572,7 +597,7 @@ static const struct samsung_pin_bank_data exynos5260_pin_banks2[] __initconst =
  * Samsung pinctrl driver data for Exynos5260 SoC. Exynos5260 SoC includes
  * three gpio/pin-mux/pinconfig controllers.
  */
-const struct samsung_pin_ctrl exynos5260_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl exynos5260_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 data */
                .pin_banks      = exynos5260_pin_banks0,
@@ -592,6 +617,11 @@ const struct samsung_pin_ctrl exynos5260_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data exynos5260_of_data __initconst = {
+       .ctrl           = exynos5260_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(exynos5260_pin_ctrl),
+};
+
 /* pin banks of exynos5410 pin-controller 0 */
 static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst = {
        EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
@@ -662,7 +692,7 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks3[] __initconst =
  * Samsung pinctrl driver data for Exynos5410 SoC. Exynos5410 SoC includes
  * four gpio/pin-mux/pinconfig controllers.
  */
-const struct samsung_pin_ctrl exynos5410_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl exynos5410_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 data */
                .pin_banks      = exynos5410_pin_banks0,
@@ -695,6 +725,11 @@ const struct samsung_pin_ctrl exynos5410_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data exynos5410_of_data __initconst = {
+       .ctrl           = exynos5410_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(exynos5410_pin_ctrl),
+};
+
 /* pin banks of exynos5420 pin-controller 0 */
 static const struct samsung_pin_bank_data exynos5420_pin_banks0[] __initconst = {
        EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpy7", 0x00),
@@ -779,7 +814,7 @@ static const struct samsung_retention_data exynos5420_retention_data __initconst
  * Samsung pinctrl driver data for Exynos5420 SoC. Exynos5420 SoC includes
  * four gpio/pin-mux/pinconfig controllers.
  */
-const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 data */
                .pin_banks      = exynos5420_pin_banks0,
@@ -813,3 +848,8 @@ const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = {
                .retention_data = &exynos4_audio_retention_data,
        },
 };
+
+const struct samsung_pinctrl_of_match_data exynos5420_of_data __initconst = {
+       .ctrl           = exynos5420_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(exynos5420_pin_ctrl),
+};
index 08e9fdb58fd2c1f203ddb34ed08f41a322bde91b..0ab88fc268eab3b858ef0cd9210ca0b939b0985f 100644 (file)
@@ -180,7 +180,7 @@ static const struct samsung_retention_data exynos5433_fsys_retention_data __init
  * Samsung pinctrl driver data for Exynos5433 SoC. Exynos5433 SoC includes
  * ten gpio/pin-mux/pinconfig controllers.
  */
-const struct samsung_pin_ctrl exynos5433_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl exynos5433_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 data */
                .pin_banks      = exynos5433_pin_banks0,
@@ -265,6 +265,11 @@ const struct samsung_pin_ctrl exynos5433_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data exynos5433_of_data __initconst = {
+       .ctrl           = exynos5433_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(exynos5433_pin_ctrl),
+};
+
 /* pin banks of exynos7 pin-controller - ALIVE */
 static const struct samsung_pin_bank_data exynos7_pin_banks0[] __initconst = {
        EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
@@ -344,7 +349,7 @@ static const struct samsung_pin_bank_data exynos7_pin_banks9[] __initconst = {
        EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
 };
 
-const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 Alive data */
                .pin_banks      = exynos7_pin_banks0,
@@ -397,3 +402,8 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
                .eint_gpio_init = exynos_eint_gpio_init,
        },
 };
+
+const struct samsung_pinctrl_of_match_data exynos7_of_data __initconst = {
+       .ctrl           = exynos7_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(exynos7_pin_ctrl),
+};
index edf27264b6036a03f166bfb004f8e183b292712d..67da1cf18b68c2a55cb687c3bcbf461443c91635 100644 (file)
@@ -570,7 +570,7 @@ static const struct samsung_pin_bank_data s3c2412_pin_banks[] __initconst = {
        PIN_BANK_2BIT(13, 0x080, "gpj"),
 };
 
-const struct samsung_pin_ctrl s3c2412_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl s3c2412_pin_ctrl[] __initconst = {
        {
                .pin_banks      = s3c2412_pin_banks,
                .nr_banks       = ARRAY_SIZE(s3c2412_pin_banks),
@@ -578,6 +578,11 @@ const struct samsung_pin_ctrl s3c2412_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data s3c2412_of_data __initconst = {
+       .ctrl           = s3c2412_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(s3c2412_pin_ctrl),
+};
+
 static const struct samsung_pin_bank_data s3c2416_pin_banks[] __initconst = {
        PIN_BANK_A(27, 0x000, "gpa"),
        PIN_BANK_2BIT(11, 0x010, "gpb"),
@@ -592,7 +597,7 @@ static const struct samsung_pin_bank_data s3c2416_pin_banks[] __initconst = {
        PIN_BANK_2BIT(2, 0x100, "gpm"),
 };
 
-const struct samsung_pin_ctrl s3c2416_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl s3c2416_pin_ctrl[] __initconst = {
        {
                .pin_banks      = s3c2416_pin_banks,
                .nr_banks       = ARRAY_SIZE(s3c2416_pin_banks),
@@ -600,6 +605,11 @@ const struct samsung_pin_ctrl s3c2416_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data s3c2416_of_data __initconst = {
+       .ctrl           = s3c2416_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(s3c2416_pin_ctrl),
+};
+
 static const struct samsung_pin_bank_data s3c2440_pin_banks[] __initconst = {
        PIN_BANK_A(25, 0x000, "gpa"),
        PIN_BANK_2BIT(11, 0x010, "gpb"),
@@ -612,7 +622,7 @@ static const struct samsung_pin_bank_data s3c2440_pin_banks[] __initconst = {
        PIN_BANK_2BIT(13, 0x0d0, "gpj"),
 };
 
-const struct samsung_pin_ctrl s3c2440_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl s3c2440_pin_ctrl[] __initconst = {
        {
                .pin_banks      = s3c2440_pin_banks,
                .nr_banks       = ARRAY_SIZE(s3c2440_pin_banks),
@@ -620,6 +630,11 @@ const struct samsung_pin_ctrl s3c2440_pin_ctrl[] __initconst = {
        },
 };
 
+const struct samsung_pinctrl_of_match_data s3c2440_of_data __initconst = {
+       .ctrl           = s3c2440_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(s3c2440_pin_ctrl),
+};
+
 static const struct samsung_pin_bank_data s3c2450_pin_banks[] __initconst = {
        PIN_BANK_A(28, 0x000, "gpa"),
        PIN_BANK_2BIT(11, 0x010, "gpb"),
@@ -635,10 +650,15 @@ static const struct samsung_pin_bank_data s3c2450_pin_banks[] __initconst = {
        PIN_BANK_2BIT(2, 0x100, "gpm"),
 };
 
-const struct samsung_pin_ctrl s3c2450_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl s3c2450_pin_ctrl[] __initconst = {
        {
                .pin_banks      = s3c2450_pin_banks,
                .nr_banks       = ARRAY_SIZE(s3c2450_pin_banks),
                .eint_wkup_init = s3c24xx_eint_init,
        },
 };
+
+const struct samsung_pinctrl_of_match_data s3c2450_of_data __initconst = {
+       .ctrl           = s3c2450_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(s3c2450_pin_ctrl),
+};
index e63663b32907439eb22de6c233532eb0329cafe6..0bdc1e683181a7ee3fbafad66b2ac88956559ec1 100644 (file)
@@ -794,7 +794,7 @@ static const struct samsung_pin_bank_data s3c64xx_pin_banks0[] __initconst = {
  * Samsung pinctrl driver data for S3C64xx SoC. S3C64xx SoC includes
  * one gpio/pin-mux/pinconfig controller.
  */
-const struct samsung_pin_ctrl s3c64xx_pin_ctrl[] __initconst = {
+static const struct samsung_pin_ctrl s3c64xx_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 1 data */
                .pin_banks      = s3c64xx_pin_banks0,
@@ -803,3 +803,8 @@ const struct samsung_pin_ctrl s3c64xx_pin_ctrl[] __initconst = {
                .eint_wkup_init = s3c64xx_eint_eint0_init,
        },
 };
+
+const struct samsung_pinctrl_of_match_data s3c64xx_of_data __initconst = {
+       .ctrl           = s3c64xx_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(s3c64xx_pin_ctrl),
+};
index e04f7fe0a65def85814c64381d5ba48326561a9c..26e8fab736f1f2e4b14eaa2495157a9750af61c8 100644 (file)
@@ -947,12 +947,33 @@ static int samsung_gpiolib_register(struct platform_device *pdev,
        return 0;
 }
 
+static const struct samsung_pin_ctrl *
+samsung_pinctrl_get_soc_data_for_of_alias(struct platform_device *pdev)
+{
+       struct device_node *node = pdev->dev.of_node;
+       const struct samsung_pinctrl_of_match_data *of_data;
+       int id;
+
+       id = of_alias_get_id(node, "pinctrl");
+       if (id < 0) {
+               dev_err(&pdev->dev, "failed to get alias id\n");
+               return NULL;
+       }
+
+       of_data = of_device_get_match_data(&pdev->dev);
+       if (id >= of_data->num_ctrl) {
+               dev_err(&pdev->dev, "invalid alias id %d\n", id);
+               return NULL;
+       }
+
+       return &(of_data->ctrl[id]);
+}
+
 /* retrieve the soc specific data */
 static const struct samsung_pin_ctrl *
 samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
                             struct platform_device *pdev)
 {
-       int id;
        struct device_node *node = pdev->dev.of_node;
        struct device_node *np;
        const struct samsung_pin_bank_data *bdata;
@@ -962,13 +983,9 @@ samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
        void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES];
        unsigned int i;
 
-       id = of_alias_get_id(node, "pinctrl");
-       if (id < 0) {
-               dev_err(&pdev->dev, "failed to get alias id\n");
+       ctrl = samsung_pinctrl_get_soc_data_for_of_alias(pdev);
+       if (!ctrl)
                return ERR_PTR(-ENOENT);
-       }
-       ctrl = of_device_get_match_data(&pdev->dev);
-       ctrl += id;
 
        d->suspend = ctrl->suspend;
        d->resume = ctrl->resume;
@@ -1193,41 +1210,41 @@ static int __maybe_unused samsung_pinctrl_resume(struct device *dev)
 static const struct of_device_id samsung_pinctrl_dt_match[] = {
 #ifdef CONFIG_PINCTRL_EXYNOS_ARM
        { .compatible = "samsung,exynos3250-pinctrl",
-               .data = exynos3250_pin_ctrl },
+               .data = &exynos3250_of_data },
        { .compatible = "samsung,exynos4210-pinctrl",
-               .data = exynos4210_pin_ctrl },
+               .data = &exynos4210_of_data },
        { .compatible = "samsung,exynos4x12-pinctrl",
-               .data = exynos4x12_pin_ctrl },
+               .data = &exynos4x12_of_data },
        { .compatible = "samsung,exynos5250-pinctrl",
-               .data = exynos5250_pin_ctrl },
+               .data = &exynos5250_of_data },
        { .compatible = "samsung,exynos5260-pinctrl",
-               .data = exynos5260_pin_ctrl },
+               .data = &exynos5260_of_data },
        { .compatible = "samsung,exynos5410-pinctrl",
-               .data = exynos5410_pin_ctrl },
+               .data = &exynos5410_of_data },
        { .compatible = "samsung,exynos5420-pinctrl",
-               .data = exynos5420_pin_ctrl },
+               .data = &exynos5420_of_data },
        { .compatible = "samsung,s5pv210-pinctrl",
-               .data = s5pv210_pin_ctrl },
+               .data = &s5pv210_of_data },
 #endif
 #ifdef CONFIG_PINCTRL_EXYNOS_ARM64
        { .compatible = "samsung,exynos5433-pinctrl",
-               .data = exynos5433_pin_ctrl },
+               .data = &exynos5433_of_data },
        { .compatible = "samsung,exynos7-pinctrl",
-               .data = exynos7_pin_ctrl },
+               .data = &exynos7_of_data },
 #endif
 #ifdef CONFIG_PINCTRL_S3C64XX
        { .compatible = "samsung,s3c64xx-pinctrl",
-               .data = s3c64xx_pin_ctrl },
+               .data = &s3c64xx_of_data },
 #endif
 #ifdef CONFIG_PINCTRL_S3C24XX
        { .compatible = "samsung,s3c2412-pinctrl",
-               .data = s3c2412_pin_ctrl },
+               .data = &s3c2412_of_data },
        { .compatible = "samsung,s3c2416-pinctrl",
-               .data = s3c2416_pin_ctrl },
+               .data = &s3c2416_of_data },
        { .compatible = "samsung,s3c2440-pinctrl",
-               .data = s3c2440_pin_ctrl },
+               .data = &s3c2440_of_data },
        { .compatible = "samsung,s3c2450-pinctrl",
-               .data = s3c2450_pin_ctrl },
+               .data = &s3c2450_of_data },
 #endif
        {},
 };
index 9af07af6cad627b5e02d4fbd362149e42dd97343..ae932e0c05f2425ae58c357ddf0a21b07db4b155 100644 (file)
@@ -285,6 +285,16 @@ struct samsung_pinctrl_drv_data {
        void (*resume)(struct samsung_pinctrl_drv_data *);
 };
 
+/**
+ * struct samsung_pinctrl_of_match_data: OF match device specific configuration data.
+ * @ctrl: array of pin controller data.
+ * @num_ctrl: size of array @ctrl.
+ */
+struct samsung_pinctrl_of_match_data {
+       const struct samsung_pin_ctrl   *ctrl;
+       unsigned int                    num_ctrl;
+};
+
 /**
  * struct samsung_pin_group: represent group of pins of a pinmux function.
  * @name: name of the pin group, used to lookup the group.
@@ -313,20 +323,20 @@ struct samsung_pmx_func {
 };
 
 /* list of all exported SoC specific data */
-extern const struct samsung_pin_ctrl exynos3250_pin_ctrl[];
-extern const struct samsung_pin_ctrl exynos4210_pin_ctrl[];
-extern const struct samsung_pin_ctrl exynos4x12_pin_ctrl[];
-extern const struct samsung_pin_ctrl exynos5250_pin_ctrl[];
-extern const struct samsung_pin_ctrl exynos5260_pin_ctrl[];
-extern const struct samsung_pin_ctrl exynos5410_pin_ctrl[];
-extern const struct samsung_pin_ctrl exynos5420_pin_ctrl[];
-extern const struct samsung_pin_ctrl exynos5433_pin_ctrl[];
-extern const struct samsung_pin_ctrl exynos7_pin_ctrl[];
-extern const struct samsung_pin_ctrl s3c64xx_pin_ctrl[];
-extern const struct samsung_pin_ctrl s3c2412_pin_ctrl[];
-extern const struct samsung_pin_ctrl s3c2416_pin_ctrl[];
-extern const struct samsung_pin_ctrl s3c2440_pin_ctrl[];
-extern const struct samsung_pin_ctrl s3c2450_pin_ctrl[];
-extern const struct samsung_pin_ctrl s5pv210_pin_ctrl[];
+extern const struct samsung_pinctrl_of_match_data exynos3250_of_data;
+extern const struct samsung_pinctrl_of_match_data exynos4210_of_data;
+extern const struct samsung_pinctrl_of_match_data exynos4x12_of_data;
+extern const struct samsung_pinctrl_of_match_data exynos5250_of_data;
+extern const struct samsung_pinctrl_of_match_data exynos5260_of_data;
+extern const struct samsung_pinctrl_of_match_data exynos5410_of_data;
+extern const struct samsung_pinctrl_of_match_data exynos5420_of_data;
+extern const struct samsung_pinctrl_of_match_data exynos5433_of_data;
+extern const struct samsung_pinctrl_of_match_data exynos7_of_data;
+extern const struct samsung_pinctrl_of_match_data s3c64xx_of_data;
+extern const struct samsung_pinctrl_of_match_data s3c2412_of_data;
+extern const struct samsung_pinctrl_of_match_data s3c2416_of_data;
+extern const struct samsung_pinctrl_of_match_data s3c2440_of_data;
+extern const struct samsung_pinctrl_of_match_data s3c2450_of_data;
+extern const struct samsung_pinctrl_of_match_data s5pv210_of_data;
 
 #endif /* __PINCTRL_SAMSUNG_H */