phy: add operation 'mode' to PHY type
authorJeongtae Park <jtp.park@samsung.com>
Thu, 26 Apr 2018 02:54:43 +0000 (11:54 +0900)
committerSunyoung Kang <sy0816.kang@samsung.com>
Mon, 23 Jul 2018 08:05:03 +0000 (17:05 +0900)
Change-Id: I66d1a2157c1b337d8eec934906a2625edf7c3781
Signed-off-by: Jeongtae Park <jtp.park@samsung.com>
drivers/phy/samsung/phy-exynos-mipi.c

index 0173ca2a589d9a6639fc9d030727241d3826249d..25f7223ae9c55cc727a728927b88605b8ef248d8 100644 (file)
@@ -55,7 +55,7 @@ enum phy_infos {
 struct exynos_mipi_phy_cfg {
        u16 major;
        u16 minor;
-       u32 type;
+       u16 mode;
        /* u32 max_speed */
        int (*set)(void __iomem *regs, int option, u32 *info);
 };
@@ -394,19 +394,19 @@ static const struct exynos_mipi_phy_cfg phy_cfg_table[] = {
        {
                .major = 0x0501,
                .minor = 0x0000,
-               .type = 0xD,
+               .mode = 0xD,
                .set = __set_phy_cfg_0501_0000_dphy,
        },
        {
                .major = 0x0502,
                .minor = 0x0000,
-               .type = 0xD,
+               .mode = 0xD,
                .set = __set_phy_cfg_0502_0000_dphy,
        },
        {
                .major = 0x0502,
                .minor = 0x0001,
-               .type = 0xD,
+               .mode = 0xD,
                .set = __set_phy_cfg_0502_0001_dphy,
        },
        { },
@@ -422,7 +422,7 @@ static int __set_phy_cfg(struct exynos_mipi_phy *state,
        for (i = 0; i < ARRAY_SIZE(phy_cfg_table); i++) {
                if ((cfg[VERSION] == MKVER(phy_cfg_table[i].major,
                                        phy_cfg_table[i].minor))
-                   && (cfg[TYPE] == phy_cfg_table[i].type)) {
+                   && ((cfg[TYPE] >> 16) == phy_cfg_table[i].mode)) {
                        ret = phy_cfg_table[i].set(phy_desc->regs,
                                        option, cfg);
                        break;