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edac: i5100 fix erroneous define for M1Err
authorNiklas Söderlund <niklas.soderlund@ericsson.com>
Fri, 17 Feb 2012 10:36:54 +0000 (07:36 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Wed, 21 Mar 2012 18:20:55 +0000 (15:20 -0300)
According to [1] the define for M1Err in the FERR_NF_MEM register is
wrong. It should be at position 1 not 0.

[1] Intel 5100 Memory Controller Hub Chipset Doc.Nr: 318378
    http://www.intel.com/content/dam/doc/datasheet/5100-
    memory-controller-hub-chipset-datasheet.pdf

Reported-by: Ba Thang Nguyen <thang.b.nguyen@dektech.com.au>
Signed-off-by: Niklas Söderlund <niklas.soderlund@ericsson.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
drivers/edac/i5100_edac.c patch | blob | blame | history

diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c
index bcbdeeca48b8910b3d365547c394d46193e5b464..ab2f906198217c73519e1af7d6e8eed414d7a713 100644 (file)
--- a/drivers/edac/i5100_edac.c
+++ b/drivers/edac/i5100_edac.c
@@ -49,7 +49,7 @@
 #define                I5100_FERR_NF_MEM_M6ERR_MASK    (1 << 6)
 #define                I5100_FERR_NF_MEM_M5ERR_MASK    (1 << 5)
 #define                I5100_FERR_NF_MEM_M4ERR_MASK    (1 << 4)
-#define                I5100_FERR_NF_MEM_M1ERR_MASK    1
+#define                I5100_FERR_NF_MEM_M1ERR_MASK    (1 << 1)
 #define                I5100_FERR_NF_MEM_ANY_MASK      \
                        (I5100_FERR_NF_MEM_M16ERR_MASK | \
                        I5100_FERR_NF_MEM_M15ERR_MASK | \