gma500: Fix Cedarview support (Correct version)
authorAlan Cox <alan@linux.intel.com>
Thu, 29 Dec 2011 14:37:03 +0000 (14:37 +0000)
committerDave Airlie <airlied@redhat.com>
Tue, 3 Jan 2012 09:30:07 +0000 (09:30 +0000)
And update to the actual product naming as the press release is now out.

http://newsroom.intel.com/docs/DOC-2553#pressmaterials

- Fixes the wrong ifdef check
- Fixes the missing crtc count declaration

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/gma500/Kconfig
drivers/gpu/drm/gma500/Makefile
drivers/gpu/drm/gma500/cdv_device.c
drivers/gpu/drm/gma500/psb_drv.c

index 78e46e82cdbd960875371c5a44a3e834772cc25c..754e14bdc8011dacef3996cbe2b8b39efdcdbd4d 100644 (file)
@@ -19,8 +19,9 @@ config DRM_GMA600
          platforms with LVDS ports. HDMI and MIPI are not currently
          supported.
 
-config DRM_CEDARVIEW
-       bool "Intel Cedarview support (Experimental)"
+config DRM_GMA3600
+       bool "Intel GMA3600/3650 support (Experimental)"
        depends on DRM_GMA500
        help
-         Say yes to include support for Intel Cedarview platforms
+         Say yes to include basic support for Intel GMA3600/3650 (Intel
+         Cedar Trail) platforms.
index 96658ec057e24684a8e01a7c568cc23ce372721f..81c103be5e21c90d97b989be5565082bcdd32cab 100644 (file)
@@ -25,7 +25,7 @@ gma500_gfx-y += gem_glue.o \
          psb_device.o \
          mid_bios.o
 
-gma500_gfx-$(CONFIG_DRM_CEDARVIEW) +=  cdv_device.o \
+gma500_gfx-$(CONFIG_DRM_GMA3600) +=  cdv_device.o \
          cdv_intel_crt.o \
          cdv_intel_display.o \
          cdv_intel_hdmi.o \
index 7e8028abcc9923f2cff0371f9e0a3f629a33b65d..4a5b099c3bc5ac9430c9b24a651f326f0295c748 100644 (file)
@@ -327,9 +327,10 @@ static int cdv_chip_setup(struct drm_device *dev)
 /* CDV is much like Poulsbo but has MID like SGX offsets and PM */
 
 const struct psb_ops cdv_chip_ops = {
-       .name = "Cedartrail",
+       .name = "GMA3600/3650",
        .accel_2d = 0,
        .pipes = 2,
+       .crtcs = 2,
        .sgx_offset = MRST_SGX_OFFSET,
        .chip_setup = cdv_chip_setup,
 
index 962b92df02e2f4c9fd08ded6c2a65c66c7213083..96756ccaa07c2aa66f5eae5dc85a1a6b78f1686d 100644 (file)
@@ -64,7 +64,7 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
        /* Atom E620 */
        { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
 #endif
-#if defined(CONFIG_DRM_CDV)
+#if defined(CONFIG_DRM_GMA3600)
        { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
        { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
        { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},