dt-bindings: rk1108-cru: rename RK1108 to RV1108
authorAndy Yan <andy.yan@rock-chips.com>
Fri, 17 Mar 2017 17:18:37 +0000 (18:18 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Wed, 22 Mar 2017 17:02:57 +0000 (18:02 +0100)
Rockchip finally named the SOC as RV1108, so change it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Documentation/devicetree/bindings/clock/rockchip,rk1108-cru.txt [deleted file]
Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk1108-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk1108-cru.txt
deleted file mode 100644 (file)
index 4da1261..0000000
+++ /dev/null
@@ -1,59 +0,0 @@
-* Rockchip RK1108 Clock and Reset Unit
-
-The RK1108 clock controller generates and supplies clock to various
-controllers within the SoC and also implements a reset controller for SoC
-peripherals.
-
-Required Properties:
-
-- compatible: should be "rockchip,rk1108-cru"
-- reg: physical base address of the controller and length of memory mapped
-  region.
-- #clock-cells: should be 1.
-- #reset-cells: should be 1.
-
-Optional Properties:
-
-- rockchip,grf: phandle to the syscon managing the "general register files"
-  If missing pll rates are not changeable, due to the missing pll lock status.
-
-Each clock is assigned an identifier and client nodes can use this identifier
-to specify the clock which they consume. All available clocks are defined as
-preprocessor macros in the dt-bindings/clock/rk1108-cru.h headers and can be
-used in device tree sources. Similar macros exist for the reset sources in
-these files.
-
-External clocks:
-
-There are several clocks that are generated outside the SoC. It is expected
-that they are defined using standard clock bindings with following
-clock-output-names:
- - "xin24m" - crystal input - required,
- - "ext_vip" - external VIP clock - optional
- - "ext_i2s" - external I2S clock - optional
- - "ext_gmac" - external GMAC clock - optional
- - "hdmiphy" - external clock input derived from HDMI PHY - optional
- - "usbphy" - external clock input derived from USB PHY - optional
-
-Example: Clock controller node:
-
-       cru: cru@20200000 {
-               compatible = "rockchip,rk1108-cru";
-               reg = <0x20200000 0x1000>;
-               rockchip,grf = <&grf>;
-
-               #clock-cells = <1>;
-               #reset-cells = <1>;
-       };
-
-Example: UART controller node that consumes the clock generated by the clock
-  controller:
-
-       uart0: serial@10230000 {
-               compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart";
-               reg = <0x10230000 0x100>;
-               interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
-               reg-shift = <2>;
-               reg-io-width = <4>;
-               clocks = <&cru SCLK_UART0>;
-       };
diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt
new file mode 100644 (file)
index 0000000..161326a
--- /dev/null
@@ -0,0 +1,59 @@
+* Rockchip RV1108 Clock and Reset Unit
+
+The RV1108 clock controller generates and supplies clock to various
+controllers within the SoC and also implements a reset controller for SoC
+peripherals.
+
+Required Properties:
+
+- compatible: should be "rockchip,rv1108-cru"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- #clock-cells: should be 1.
+- #reset-cells: should be 1.
+
+Optional Properties:
+
+- rockchip,grf: phandle to the syscon managing the "general register files"
+  If missing pll rates are not changeable, due to the missing pll lock status.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. All available clocks are defined as
+preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be
+used in device tree sources. Similar macros exist for the reset sources in
+these files.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - "xin24m" - crystal input - required,
+ - "ext_vip" - external VIP clock - optional
+ - "ext_i2s" - external I2S clock - optional
+ - "ext_gmac" - external GMAC clock - optional
+ - "hdmiphy" - external clock input derived from HDMI PHY - optional
+ - "usbphy" - external clock input derived from USB PHY - optional
+
+Example: Clock controller node:
+
+       cru: cru@20200000 {
+               compatible = "rockchip,rv1108-cru";
+               reg = <0x20200000 0x1000>;
+               rockchip,grf = <&grf>;
+
+               #clock-cells = <1>;
+               #reset-cells = <1>;
+       };
+
+Example: UART controller node that consumes the clock generated by the clock
+  controller:
+
+       uart0: serial@10230000 {
+               compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
+               reg = <0x10230000 0x100>;
+               interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+               reg-shift = <2>;
+               reg-io-width = <4>;
+               clocks = <&cru SCLK_UART0>;
+       };