stmmac: adding DT parameter for LPI tx clock gating
authorjpinto <Joao.Pinto@synopsys.com>
Mon, 9 Jan 2017 12:35:08 +0000 (12:35 +0000)
committerDavid S. Miller <davem@davemloft.net>
Mon, 9 Jan 2017 19:54:29 +0000 (14:54 -0500)
This patch adds a new parameter to the stmmac DT: snps,en-tx-lpi-clockgating.
It was ported from synopsys/dwc_eth_qos.c and it is useful if lpi tx clock
gating is needed by stmmac users also.

Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Tested-by: Niklas Cassel <niklas.cassel@axis.com>
Reviewed-by: Lars Persson <larper@axis.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Documentation/devicetree/bindings/net/stmmac.txt
drivers/net/ethernet/stmicro/stmmac/common.h
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
drivers/net/ethernet/stmicro/stmmac/dwmac4.h
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
include/linux/stmmac.h

index c3d2fd480a1b1165dfe51146c81836ad9920db0f..d3bfc2b30fb5ecc07493b4c5510d5cdc32b3ff3a 100644 (file)
@@ -49,6 +49,8 @@ Optional properties:
 - snps,force_sf_dma_mode       Force DMA to use the Store and Forward
                                mode for both tx and rx. This flag is
                                ignored if force_thresh_dma_mode is set.
+- snps,en-tx-lpi-clockgating   Enable gating of the MAC TX clock during
+                               TX low-power mode
 - snps,multicast-filter-bins:  Number of multicast filter hash bins
                                supported by this device instance
 - snps,perfect-filter-entries: Number of perfect filter entries supported
index 6c96291384620ebc64a841d86d253e409f0bd245..75e2666df940fc16d06eebe2efbe81ea0a89edd2 100644 (file)
@@ -476,7 +476,8 @@ struct stmmac_ops {
                              unsigned int reg_n);
        void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
                              unsigned int reg_n);
-       void (*set_eee_mode)(struct mac_device_info *hw);
+       void (*set_eee_mode)(struct mac_device_info *hw,
+                            bool en_tx_lpi_clockgating);
        void (*reset_eee_mode)(struct mac_device_info *hw);
        void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);
        void (*set_eee_pls)(struct mac_device_info *hw, int link);
index be3c91c7f211d94ad7386b77de73676933a46dcd..a5ffca116edd6503dbedf0456a3f3f6b246e089c 100644 (file)
@@ -343,11 +343,14 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
        return ret;
 }
 
-static void dwmac1000_set_eee_mode(struct mac_device_info *hw)
+static void dwmac1000_set_eee_mode(struct mac_device_info *hw,
+                                  bool en_tx_lpi_clockgating)
 {
        void __iomem *ioaddr = hw->pcsr;
        u32 value;
 
+       /*TODO - en_tx_lpi_clockgating treatment */
+
        /* Enable the link status receive on RGMII, SGMII ore SMII
         * receive path and instruct the transmit to enter in LPI
         * state.
index 73d1dabcdba3b1915bbc443873fa89c9c4a88e59..db45134fddf04e50c703254b8570b744004123f8 100644 (file)
@@ -98,6 +98,7 @@ enum power_event {
 #define GMAC4_LPI_TIMER_CTRL   0xd4
 
 /* LPI control and status defines */
+#define GMAC4_LPI_CTRL_STATUS_LPITCSE  BIT(21) /* LPI Tx Clock Stop Enable */
 #define GMAC4_LPI_CTRL_STATUS_LPITXA   BIT(19) /* Enable LPI TX Automate */
 #define GMAC4_LPI_CTRL_STATUS_PLS      BIT(17) /* PHY Link Status */
 #define GMAC4_LPI_CTRL_STATUS_LPIEN    BIT(16) /* LPI Enable */
index 02eab798050d35eab8a2283763e0702c76fa474e..834f40f082084912339ddf008ef65539a2508ba4 100644 (file)
@@ -137,7 +137,8 @@ static void dwmac4_get_umac_addr(struct mac_device_info *hw,
                                   GMAC_ADDR_LOW(reg_n));
 }
 
-static void dwmac4_set_eee_mode(struct mac_device_info *hw)
+static void dwmac4_set_eee_mode(struct mac_device_info *hw,
+                               bool en_tx_lpi_clockgating)
 {
        void __iomem *ioaddr = hw->pcsr;
        u32 value;
@@ -149,6 +150,9 @@ static void dwmac4_set_eee_mode(struct mac_device_info *hw)
        value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);
        value |= GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA;
 
+       if (en_tx_lpi_clockgating)
+               value |= GMAC4_LPI_CTRL_STATUS_LPITCSE;
+
        writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);
 }
 
index 92ac0064a52e668c9344ed3cd3441d02d077698e..fa0b4de74c3e8daf343280b74542ae3cb3767edf 100644 (file)
@@ -239,7 +239,8 @@ static void stmmac_enable_eee_mode(struct stmmac_priv *priv)
        /* Check and enter in LPI mode */
        if ((priv->dirty_tx == priv->cur_tx) &&
            (priv->tx_path_in_lpi_mode == false))
-               priv->hw->mac->set_eee_mode(priv->hw);
+               priv->hw->mac->set_eee_mode(priv->hw,
+                                           priv->plat->en_tx_lpi_clockgating);
 }
 
 /**
index 60ba8993c65062ad821a43992f99871eae01b23d..78ccb50cfa4feb36e68a36602c2940ce7d02442a 100644 (file)
@@ -248,6 +248,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
        plat->force_sf_dma_mode =
                of_property_read_bool(np, "snps,force_sf_dma_mode");
 
+       plat->en_tx_lpi_clockgating =
+               of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
+
        /* Set the maxmtu to a default of JUMBO_LEN in case the
         * parameter is not present in the device tree.
         */
index 889e0e9a3f1cf89a3be3b28617043590a6b8d9db..e3cd7588623daf67293e74f896d8d07568e0814e 100644 (file)
@@ -142,5 +142,6 @@ struct plat_stmmacenet_data {
        int has_gmac4;
        bool tso_en;
        int mac_port_sel_speed;
+       bool en_tx_lpi_clockgating;
 };
 #endif