drm/nouveau/gpio: rename g92 class to g94

nv92 hardware has only 16 interrupt lines, while nv94 and later
has 32. Accessing 0xe0c{0,4} registers on nv92 can lead to incorrect
PDISP setup. This is a regression introduced with

commit 9d0f5ec9ee0fd5dc5fc1cc2cf559286431e406e3
Author: Ben Skeggs <bskeggs@redhat.com>
Date:   Mon May 12 15:22:42 2014 +1000

    gpio: split g92 class from nv50

Reported-by: estece on #nouveau
Cc: stable@vger.kernel.org # 3.16+
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
index e3de7a1c7e4e50adc38109183d3c2e27bfab0ea6..949a034e5c8439481c4ce3b44b1cb002f966daa6 100644 (file)
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -137,7 +137,7 @@ nouveau-y += core/subdev/fuse/gm107.o
 nouveau-y += core/subdev/gpio/base.o
 nouveau-y += core/subdev/gpio/nv10.o
 nouveau-y += core/subdev/gpio/nv50.o
-nouveau-y += core/subdev/gpio/nv92.o
+nouveau-y += core/subdev/gpio/nv94.o
 nouveau-y += core/subdev/gpio/nvd0.o
 nouveau-y += core/subdev/gpio/nve0.o
 nouveau-y += core/subdev/i2c/base.o

diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nv50.c b/drivers/gpu/drm/nouveau/core/engine/device/nv50.c
index ca265fe30927ce593ffe05105bec0d42ab33824c..96f568d1321bc8d44abca71d98956a8dc3b01799 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/device/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nv50.c
@@ -145,7 +145,7 @@ nv50_identify(struct nouveau_device *device)
        case 0x92:
                device->cname = "G92";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv50_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv50_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nv84_clock_oclass;
@@ -174,7 +174,7 @@ nv50_identify(struct nouveau_device *device)
        case 0x94:
                device->cname = "G94";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nv84_clock_oclass;
@@ -203,7 +203,7 @@ nv50_identify(struct nouveau_device *device)
        case 0x96:
                device->cname = "G96";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nv84_clock_oclass;
@@ -232,7 +232,7 @@ nv50_identify(struct nouveau_device *device)
        case 0x98:
                device->cname = "G98";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nv84_clock_oclass;
@@ -261,7 +261,7 @@ nv50_identify(struct nouveau_device *device)
        case 0xa0:
                device->cname = "G200";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv50_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nv84_clock_oclass;
@@ -290,7 +290,7 @@ nv50_identify(struct nouveau_device *device)
        case 0xaa:
                device->cname = "MCP77/MCP78";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nvaa_clock_oclass;
@@ -319,7 +319,7 @@ nv50_identify(struct nouveau_device *device)
        case 0xac:
                device->cname = "MCP79/MCP7A";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nvaa_clock_oclass;
@@ -348,7 +348,7 @@ nv50_identify(struct nouveau_device *device)
        case 0xa3:
                device->cname = "GT215";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nva3_clock_oclass;
@@ -379,7 +379,7 @@ nv50_identify(struct nouveau_device *device)
        case 0xa5:
                device->cname = "GT216";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nva3_clock_oclass;
@@ -409,7 +409,7 @@ nv50_identify(struct nouveau_device *device)
        case 0xa8:
                device->cname = "GT218";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nva3_clock_oclass;
@@ -439,7 +439,7 @@ nv50_identify(struct nouveau_device *device)
        case 0xaf:
                device->cname = "MCP89";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] =  &g80_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nva3_clock_oclass;

diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
index 89b9fd411ef0a755c1164584f7b050b9770fed2e..cd05677ad4b7a128a087f4b611f73b5ab4978006 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
@@ -61,7 +61,7 @@ nvc0_identify(struct nouveau_device *device)
        case 0xc0:
                device->cname = "GF100";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
@@ -94,7 +94,7 @@ nvc0_identify(struct nouveau_device *device)
        case 0xc4:
                device->cname = "GF104";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
@@ -127,7 +127,7 @@ nvc0_identify(struct nouveau_device *device)
        case 0xc3:
                device->cname = "GF106";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
@@ -159,7 +159,7 @@ nvc0_identify(struct nouveau_device *device)
        case 0xce:
                device->cname = "GF114";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
@@ -192,7 +192,7 @@ nvc0_identify(struct nouveau_device *device)
        case 0xcf:
                device->cname = "GF116";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
@@ -225,7 +225,7 @@ nvc0_identify(struct nouveau_device *device)
        case 0xc1:
                device->cname = "GF108";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
@@ -257,7 +257,7 @@ nvc0_identify(struct nouveau_device *device)
        case 0xc8:
                device->cname = "GF110";
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
-               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv92_gpio_oclass;
+               device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv94_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] =  nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;

diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/gpio.h b/drivers/gpu/drm/nouveau/core/include/subdev/gpio.h
index b73733d21cc71c64d9871a0b8685cf21e3a2fc75..f855140dbcb70d3c081bbadaf941cfe25a5a14c2 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/include/subdev/gpio.h
+++ b/drivers/gpu/drm/nouveau/core/include/subdev/gpio.h
@@ -40,7 +40,7 @@ nouveau_gpio(void *obj)
 
 extern struct nouveau_oclass *nv10_gpio_oclass;
 extern struct nouveau_oclass *nv50_gpio_oclass;
-extern struct nouveau_oclass *nv92_gpio_oclass;
+extern struct nouveau_oclass *nv94_gpio_oclass;
 extern struct nouveau_oclass *nvd0_gpio_oclass;
 extern struct nouveau_oclass *nve0_gpio_oclass;
 

diff --git a/drivers/gpu/drm/nouveau/core/subdev/gpio/nv92.c b/drivers/gpu/drm/nouveau/core/subdev/gpio/nv92.c
deleted file mode 100644 (file)
index 252083d..0000000
--- a/drivers/gpu/drm/nouveau/core/subdev/gpio/nv92.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "priv.h"
-
-void
-nv92_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
-{
-       u32 intr0 = nv_rd32(gpio, 0x00e054);
-       u32 intr1 = nv_rd32(gpio, 0x00e074);
-       u32 stat0 = nv_rd32(gpio, 0x00e050) & intr0;
-       u32 stat1 = nv_rd32(gpio, 0x00e070) & intr1;
-       *lo = (stat1 & 0xffff0000) | (stat0 >> 16);
-       *hi = (stat1 << 16) | (stat0 & 0x0000ffff);
-       nv_wr32(gpio, 0x00e054, intr0);
-       nv_wr32(gpio, 0x00e074, intr1);
-}
-
-void
-nv92_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
-{
-       u32 inte0 = nv_rd32(gpio, 0x00e050);
-       u32 inte1 = nv_rd32(gpio, 0x00e070);
-       if (type & NVKM_GPIO_LO)
-               inte0 = (inte0 & ~(mask << 16)) | (data << 16);
-       if (type & NVKM_GPIO_HI)
-               inte0 = (inte0 & ~(mask & 0xffff)) | (data & 0xffff);
-       mask >>= 16;
-       data >>= 16;
-       if (type & NVKM_GPIO_LO)
-               inte1 = (inte1 & ~(mask << 16)) | (data << 16);
-       if (type & NVKM_GPIO_HI)
-               inte1 = (inte1 & ~mask) | data;
-       nv_wr32(gpio, 0x00e050, inte0);
-       nv_wr32(gpio, 0x00e070, inte1);
-}
-
-struct nouveau_oclass *
-nv92_gpio_oclass = &(struct nouveau_gpio_impl) {
-       .base.handle = NV_SUBDEV(GPIO, 0x92),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = _nouveau_gpio_ctor,
-               .dtor = _nouveau_gpio_dtor,
-               .init = _nouveau_gpio_init,
-               .fini = _nouveau_gpio_fini,
-       },
-       .lines = 32,
-       .intr_stat = nv92_gpio_intr_stat,
-       .intr_mask = nv92_gpio_intr_mask,
-       .drive = nv50_gpio_drive,
-       .sense = nv50_gpio_sense,
-       .reset = nv50_gpio_reset,
-}.base;

diff --git a/drivers/gpu/drm/nouveau/core/subdev/gpio/nv94.c b/drivers/gpu/drm/nouveau/core/subdev/gpio/nv94.c
new file mode 100644 (file)
index 0000000..cae404c
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/core/subdev/gpio/nv94.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include "priv.h"
+
+void
+nv94_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
+{
+       u32 intr0 = nv_rd32(gpio, 0x00e054);
+       u32 intr1 = nv_rd32(gpio, 0x00e074);
+       u32 stat0 = nv_rd32(gpio, 0x00e050) & intr0;
+       u32 stat1 = nv_rd32(gpio, 0x00e070) & intr1;
+       *lo = (stat1 & 0xffff0000) | (stat0 >> 16);
+       *hi = (stat1 << 16) | (stat0 & 0x0000ffff);
+       nv_wr32(gpio, 0x00e054, intr0);
+       nv_wr32(gpio, 0x00e074, intr1);
+}
+
+void
+nv94_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
+{
+       u32 inte0 = nv_rd32(gpio, 0x00e050);
+       u32 inte1 = nv_rd32(gpio, 0x00e070);
+       if (type & NVKM_GPIO_LO)
+               inte0 = (inte0 & ~(mask << 16)) | (data << 16);
+       if (type & NVKM_GPIO_HI)
+               inte0 = (inte0 & ~(mask & 0xffff)) | (data & 0xffff);
+       mask >>= 16;
+       data >>= 16;
+       if (type & NVKM_GPIO_LO)
+               inte1 = (inte1 & ~(mask << 16)) | (data << 16);
+       if (type & NVKM_GPIO_HI)
+               inte1 = (inte1 & ~mask) | data;
+       nv_wr32(gpio, 0x00e050, inte0);
+       nv_wr32(gpio, 0x00e070, inte1);
+}
+
+struct nouveau_oclass *
+nv94_gpio_oclass = &(struct nouveau_gpio_impl) {
+       .base.handle = NV_SUBDEV(GPIO, 0x94),
+       .base.ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = _nouveau_gpio_ctor,
+               .dtor = _nouveau_gpio_dtor,
+               .init = _nouveau_gpio_init,
+               .fini = _nouveau_gpio_fini,
+       },
+       .lines = 32,
+       .intr_stat = nv94_gpio_intr_stat,
+       .intr_mask = nv94_gpio_intr_mask,
+       .drive = nv50_gpio_drive,
+       .sense = nv50_gpio_sense,
+       .reset = nv50_gpio_reset,
+}.base;

diff --git a/drivers/gpu/drm/nouveau/core/subdev/gpio/nvd0.c b/drivers/gpu/drm/nouveau/core/subdev/gpio/nvd0.c
index a4682b0956ad3ef325451eb083393c4a741e8cee..480d6d2af770c98dde41c97bce82b5fd124cf2c2 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/gpio/nvd0.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/gpio/nvd0.c
@@ -77,8 +77,8 @@ nvd0_gpio_oclass = &(struct nouveau_gpio_impl) {
                .fini = _nouveau_gpio_fini,
        },
        .lines = 32,
-       .intr_stat = nv92_gpio_intr_stat,
-       .intr_mask = nv92_gpio_intr_mask,
+       .intr_stat = nv94_gpio_intr_stat,
+       .intr_mask = nv94_gpio_intr_mask,
        .drive = nvd0_gpio_drive,
        .sense = nvd0_gpio_sense,
        .reset = nvd0_gpio_reset,

diff --git a/drivers/gpu/drm/nouveau/core/subdev/gpio/priv.h b/drivers/gpu/drm/nouveau/core/subdev/gpio/priv.h
index e1724dfc86ae2edfe9801e59acd749203f304977..bff98b86e2b53b5cce1f7439cd7f0a48be667032 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/gpio/priv.h
+++ b/drivers/gpu/drm/nouveau/core/subdev/gpio/priv.h
@@ -56,8 +56,8 @@ void nv50_gpio_reset(struct nouveau_gpio *, u8);
 int  nv50_gpio_drive(struct nouveau_gpio *, int, int, int);
 int  nv50_gpio_sense(struct nouveau_gpio *, int);
 
-void nv92_gpio_intr_stat(struct nouveau_gpio *, u32 *, u32 *);
-void nv92_gpio_intr_mask(struct nouveau_gpio *, u32, u32, u32);
+void nv94_gpio_intr_stat(struct nouveau_gpio *, u32 *, u32 *);
+void nv94_gpio_intr_mask(struct nouveau_gpio *, u32, u32, u32);
 
 void nvd0_gpio_reset(struct nouveau_gpio *, u8);
 int  nvd0_gpio_drive(struct nouveau_gpio *, int, int, int);