ata: ahci_brcmstb: add a quirk for MIPS-based platforms
authorJaedon Shin <jaedon.shin@gmail.com>
Thu, 26 Nov 2015 02:56:31 +0000 (11:56 +0900)
committerTejun Heo <tj@kernel.org>
Mon, 30 Nov 2015 14:57:32 +0000 (09:57 -0500)
Whereas ARM-based platforms have four phy interface registers and
information, the MIPS-based platforms have only three registers, and
there are no information and documentation. In the original BSP, It
using "strict-ahci" did not control these registers.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
drivers/ata/ahci_brcmstb.c

index 69b8b0252c58043642be252a82a6066b0b44606b..49f5a9ea17fb0fef0f87c103b665e508bff45c1d 100644 (file)
@@ -71,6 +71,7 @@
 
 enum brcm_ahci_quirks {
        BRCM_AHCI_QUIRK_NO_NCQ          = BIT(0),
+       BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE = BIT(1),
 };
 
 struct brcm_ahci_priv {
@@ -119,6 +120,9 @@ static void brcm_sata_phy_enable(struct brcm_ahci_priv *priv, int port)
        void __iomem *p;
        u32 reg;
 
+       if (priv->quirks & BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE)
+               return;
+
        /* clear PHY_DEFAULT_POWER_STATE */
        p = phyctrl + SATA_TOP_CTRL_PHY_CTRL_1;
        reg = brcm_sata_readreg(p);
@@ -148,6 +152,9 @@ static void brcm_sata_phy_disable(struct brcm_ahci_priv *priv, int port)
        void __iomem *p;
        u32 reg;
 
+       if (priv->quirks & BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE)
+               return;
+
        /* power-off the PHY digital logic */
        p = phyctrl + SATA_TOP_CTRL_PHY_CTRL_2;
        reg = brcm_sata_readreg(p);
@@ -261,8 +268,10 @@ static int brcm_ahci_probe(struct platform_device *pdev)
        if (IS_ERR(priv->top_ctrl))
                return PTR_ERR(priv->top_ctrl);
 
-       if (of_device_is_compatible(dev->of_node, "brcm,bcm7425-ahci"))
+       if (of_device_is_compatible(dev->of_node, "brcm,bcm7425-ahci")) {
                priv->quirks |= BRCM_AHCI_QUIRK_NO_NCQ;
+               priv->quirks |= BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE;
+       }
 
        brcm_sata_init(priv);