drm/nouveau/ce/gm204: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h
index 7e29c52617ea3714c2d27c5f3c1653149fa85652..e832f729e1b4ec4bb0e16422ef9b76c9a9b2c5b9 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h
@@ -10,4 +10,7 @@ extern struct nvkm_oclass gf100_ce1_oclass;
 extern struct nvkm_oclass gk104_ce0_oclass;
 extern struct nvkm_oclass gk104_ce1_oclass;
 extern struct nvkm_oclass gk104_ce2_oclass;
+extern struct nvkm_oclass gm204_ce0_oclass;
+extern struct nvkm_oclass gm204_ce1_oclass;
+extern struct nvkm_oclass gm204_ce2_oclass;
 #endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild
index 858797453e0bdc51f3b01e0c2c7d704864d09908..fa8cda7058cd5e6f67b5b7519f7eb6185cd611c7 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild
@@ -1,3 +1,4 @@
 nvkm-y += nvkm/engine/ce/gt215.o
 nvkm-y += nvkm/engine/ce/gf100.o
 nvkm-y += nvkm/engine/ce/gk104.o
+nvkm-y += nvkm/engine/ce/gm204.o

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm204.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm204.c
new file mode 100644 (file)
index 0000000..577eb2e
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm204.c
@@ -0,0 +1,173 @@
+/*
+ * Copyright 2015 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include <engine/ce.h>
+
+#include <core/engctx.h>
+
+struct gm204_ce_priv {
+       struct nvkm_engine base;
+};
+
+/*******************************************************************************
+ * Copy object classes
+ ******************************************************************************/
+
+static struct nvkm_oclass
+gm204_ce_sclass[] = {
+       { 0xb0b5, &nvkm_object_ofuncs },
+       {},
+};
+
+/*******************************************************************************
+ * PCE context
+ ******************************************************************************/
+
+static struct nvkm_ofuncs
+gm204_ce_context_ofuncs = {
+       .ctor = _nvkm_engctx_ctor,
+       .dtor = _nvkm_engctx_dtor,
+       .init = _nvkm_engctx_init,
+       .fini = _nvkm_engctx_fini,
+       .rd32 = _nvkm_engctx_rd32,
+       .wr32 = _nvkm_engctx_wr32,
+};
+
+static struct nvkm_oclass
+gm204_ce_cclass = {
+       .handle = NV_ENGCTX(CE0, 0x24),
+       .ofuncs = &gm204_ce_context_ofuncs,
+};
+
+/*******************************************************************************
+ * PCE engine/subdev functions
+ ******************************************************************************/
+
+static void
+gm204_ce_intr(struct nvkm_subdev *subdev)
+{
+       const int ce = nv_subidx(subdev) - NVDEV_ENGINE_CE0;
+       struct gm204_ce_priv *priv = (void *)subdev;
+       u32 stat = nv_rd32(priv, 0x104908 + (ce * 0x1000));
+
+       if (stat) {
+               nv_warn(priv, "unhandled intr 0x%08x\n", stat);
+               nv_wr32(priv, 0x104908 + (ce * 0x1000), stat);
+       }
+}
+
+static int
+gm204_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+              struct nvkm_oclass *oclass, void *data, u32 size,
+              struct nvkm_object **pobject)
+{
+       struct gm204_ce_priv *priv;
+       int ret;
+
+       ret = nvkm_engine_create(parent, engine, oclass, true,
+                                "PCE0", "ce0", &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->unit = 0x00000040;
+       nv_subdev(priv)->intr = gm204_ce_intr;
+       nv_engine(priv)->cclass = &gm204_ce_cclass;
+       nv_engine(priv)->sclass = gm204_ce_sclass;
+       return 0;
+}
+
+static int
+gm204_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+              struct nvkm_oclass *oclass, void *data, u32 size,
+              struct nvkm_object **pobject)
+{
+       struct gm204_ce_priv *priv;
+       int ret;
+
+       ret = nvkm_engine_create(parent, engine, oclass, true,
+                                "PCE1", "ce1", &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->unit = 0x00000080;
+       nv_subdev(priv)->intr = gm204_ce_intr;
+       nv_engine(priv)->cclass = &gm204_ce_cclass;
+       nv_engine(priv)->sclass = gm204_ce_sclass;
+       return 0;
+}
+
+static int
+gm204_ce2_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+              struct nvkm_oclass *oclass, void *data, u32 size,
+              struct nvkm_object **pobject)
+{
+       struct gm204_ce_priv *priv;
+       int ret;
+
+       ret = nvkm_engine_create(parent, engine, oclass, true,
+                                "PCE2", "ce2", &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->unit = 0x00200000;
+       nv_subdev(priv)->intr = gm204_ce_intr;
+       nv_engine(priv)->cclass = &gm204_ce_cclass;
+       nv_engine(priv)->sclass = gm204_ce_sclass;
+       return 0;
+}
+
+struct nvkm_oclass
+gm204_ce0_oclass = {
+       .handle = NV_ENGINE(CE0, 0x24),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gm204_ce0_ctor,
+               .dtor = _nvkm_engine_dtor,
+               .init = _nvkm_engine_init,
+               .fini = _nvkm_engine_fini,
+       },
+};
+
+struct nvkm_oclass
+gm204_ce1_oclass = {
+       .handle = NV_ENGINE(CE1, 0x24),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gm204_ce1_ctor,
+               .dtor = _nvkm_engine_dtor,
+               .init = _nvkm_engine_init,
+               .fini = _nvkm_engine_fini,
+       },
+};
+
+struct nvkm_oclass
+gm204_ce2_oclass = {
+       .handle = NV_ENGINE(CE2, 0x24),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gm204_ce2_ctor,
+               .dtor = _nvkm_engine_dtor,
+               .init = _nvkm_engine_init,
+               .fini = _nvkm_engine_fini,
+       },
+};

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
index 7f424827191594dfe36713a798cafcdb0d23823a..b66b1c6d5b25fa875f0baedf96adbeb7ceee7bbc 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
@@ -133,10 +133,10 @@ gm100_identify(struct nvkm_device *device)
                device->oclass[NVDEV_ENGINE_GR     ] =  gm107_gr_oclass;
 #endif
                device->oclass[NVDEV_ENGINE_DISP   ] =  gm204_disp_oclass;
-#if 0
                device->oclass[NVDEV_ENGINE_CE0    ] = &gm204_ce0_oclass;
                device->oclass[NVDEV_ENGINE_CE1    ] = &gm204_ce1_oclass;
                device->oclass[NVDEV_ENGINE_CE2    ] = &gm204_ce2_oclass;
+#if 0
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;