So far, we're always writing all possible LRs, setting the empty
ones with a zero value. This is obvious doing a low of work for
nothing, and we're better off clearing those we've actually
dirtied on the exit path (it is very rare to inject more than one
interrupt at a time anyway).
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
}
cpu_if->vgic_lr[i] = __gic_v3_get_lr(i);
+ __gic_v3_set_lr(0, i);
}
switch (nr_pri_bits) {
}
for (i = 0; i <= max_lr_idx; i++) {
- val = 0;
-
- if (live_lrs & (1 << i))
- val = cpu_if->vgic_lr[i];
+ if (!(live_lrs & (1 << i)))
+ continue;
- __gic_v3_set_lr(val, i);
+ __gic_v3_set_lr(cpu_if->vgic_lr[i], i);
}
}