ath9k_hw: Add new member into the eeprom structure.
authorSenthil Balasubramanian <senthilkumar@atheros.com>
Wed, 10 Nov 2010 13:03:07 +0000 (05:03 -0800)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 16 Nov 2010 21:37:05 +0000 (16:37 -0500)
Add eeprom base extension structures which are needed for
AR938x caliberation changes and gain calculation.

Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
drivers/net/wireless/ath/ath9k/ar9003_eeprom.h

index a88fe0d6142fe4ea5a5eb69f2e6b1d023cb1eebb..bc3f49c5c5b47da6b9119177bc486d0592d65bfa 100644 (file)
@@ -147,10 +147,13 @@ static const struct ar9300_eeprom ar9300_default = {
                .papdRateMaskHt20 = LE32(0x80c080),
                .papdRateMaskHt40 = LE32(0x80c080),
                .futureModal = {
-                       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-                       0, 0, 0, 0, 0, 0, 0, 0
+                       0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
                },
         },
+       .base_ext1 = {
+               .ant_div_control = 0,
+               .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
+       },
        .calFreqPier2G = {
                FREQ2FBIN(2412, 1),
                FREQ2FBIN(2437, 1),
@@ -285,8 +288,7 @@ static const struct ar9300_eeprom ar9300_default = {
                        /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
                        /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
                        /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
-                       /* Data[11].ctlEdges[3].bChannel */
-                       FREQ2FBIN(2462, 1),
+                       /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
                }
         },
        .ctlPowerData_2G = {
@@ -346,10 +348,17 @@ static const struct ar9300_eeprom ar9300_default = {
                .papdRateMaskHt20 = LE32(0xf0e0e0),
                .papdRateMaskHt40 = LE32(0xf0e0e0),
                .futureModal = {
-                       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-                       0, 0, 0, 0, 0, 0, 0, 0
+                       0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
                },
         },
+       .base_ext2 = {
+               .tempSlopeLow = 0,
+               .tempSlopeHigh = 0,
+               .xatten1DBLow = {0, 0, 0},
+               .xatten1MarginLow = {0, 0, 0},
+               .xatten1DBHigh = {0, 0, 0},
+               .xatten1MarginHigh = {0, 0, 0}
+       },
        .calFreqPier5G = {
                FREQ2FBIN(5180, 0),
                FREQ2FBIN(5220, 0),
index 3c533bb983c72859c9fbea4563070f387747506e..5301df3e9ec0eb4d9d8f0f3e4e52c08f09391f6c 100644 (file)
@@ -236,7 +236,7 @@ struct ar9300_modal_eep_header {
        u8 thresh62;
        __le32 papdRateMaskHt20;
        __le32 papdRateMaskHt40;
-       u8 futureModal[24];
+       u8 futureModal[10];
 } __packed;
 
 struct ar9300_cal_data_per_freq_op_loop {
@@ -274,6 +274,20 @@ struct cal_ctl_data_5g {
        struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G];
 } __packed;
 
+struct ar9300_BaseExtension_1 {
+       u8 ant_div_control;
+       u8 future[13];
+} __packed;
+
+struct ar9300_BaseExtension_2 {
+       int8_t    tempSlopeLow;
+       int8_t    tempSlopeHigh;
+       u8   xatten1DBLow[AR9300_MAX_CHAINS];
+       u8   xatten1MarginLow[AR9300_MAX_CHAINS];
+       u8   xatten1DBHigh[AR9300_MAX_CHAINS];
+       u8   xatten1MarginHigh[AR9300_MAX_CHAINS];
+} __packed;
+
 struct ar9300_eeprom {
        u8 eepromVersion;
        u8 templateVersion;
@@ -283,6 +297,7 @@ struct ar9300_eeprom {
        struct ar9300_base_eep_hdr baseEepHeader;
 
        struct ar9300_modal_eep_header modalHeader2G;
+       struct ar9300_BaseExtension_1 base_ext1;
        u8 calFreqPier2G[AR9300_NUM_2G_CAL_PIERS];
        struct ar9300_cal_data_per_freq_op_loop
         calPierData2G[AR9300_MAX_CHAINS][AR9300_NUM_2G_CAL_PIERS];
@@ -302,6 +317,7 @@ struct ar9300_eeprom {
        u8 ctl_freqbin_2G[AR9300_NUM_CTLS_2G][AR9300_NUM_BAND_EDGES_2G];
        struct cal_ctl_data_2g ctlPowerData_2G[AR9300_NUM_CTLS_2G];
        struct ar9300_modal_eep_header modalHeader5G;
+       struct ar9300_BaseExtension_2 base_ext2;
        u8 calFreqPier5G[AR9300_NUM_5G_CAL_PIERS];
        struct ar9300_cal_data_per_freq_op_loop
         calPierData5G[AR9300_MAX_CHAINS][AR9300_NUM_5G_CAL_PIERS];