IB/hfi1: Consolidate pio control masks into single definition
authorMike Marciniszyn <mike.marciniszyn@intel.com>
Sun, 25 Sep 2016 14:40:58 +0000 (07:40 -0700)
committerDoug Ledford <dledford@redhat.com>
Sun, 2 Oct 2016 12:42:11 +0000 (08:42 -0400)
This allows for adding additional pages of adaptive pio
opcode control including manufacturer specific ones.

Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
drivers/infiniband/hw/hfi1/rc.c
drivers/infiniband/hw/hfi1/uc.c
drivers/infiniband/hw/hfi1/verbs.c
drivers/infiniband/hw/hfi1/verbs.h

index db6396752a979fbb54f099d3effc83f05ca493eb..d32f0c86a6234e88aab71e83893cb44033196561 100644 (file)
@@ -55,7 +55,7 @@
 #include "trace.h"
 
 /* cut down ridiculously long IB macro names */
-#define OP(x) IB_OPCODE_RC_##x
+#define OP(x) RC_OP(x)
 
 /**
  * hfi1_add_retry_timer - add/start a retry timer
@@ -184,18 +184,6 @@ void hfi1_del_timers_sync(struct rvt_qp *qp)
        del_timer_sync(&priv->s_rnr_timer);
 }
 
-/* only opcode mask for adaptive pio */
-const u32 rc_only_opcode =
-       BIT(OP(SEND_ONLY) & 0x1f) |
-       BIT(OP(SEND_ONLY_WITH_IMMEDIATE & 0x1f)) |
-       BIT(OP(RDMA_WRITE_ONLY & 0x1f)) |
-       BIT(OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE & 0x1f)) |
-       BIT(OP(RDMA_READ_REQUEST & 0x1f)) |
-       BIT(OP(ACKNOWLEDGE & 0x1f)) |
-       BIT(OP(ATOMIC_ACKNOWLEDGE & 0x1f)) |
-       BIT(OP(COMPARE_SWAP & 0x1f)) |
-       BIT(OP(FETCH_ADD & 0x1f));
-
 static u32 restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe,
                       u32 psn, u32 pmtu)
 {
index e7fa176f8dfc4066193222b6110ebbc36649257d..5e6d1bac4914a3ae1ad4d3111155141a28b8a59d 100644 (file)
 #include "qp.h"
 
 /* cut down ridiculously long IB macro names */
-#define OP(x) IB_OPCODE_UC_##x
-
-/* only opcode mask for adaptive pio */
-const u32 uc_only_opcode =
-       BIT(OP(SEND_ONLY) & 0x1f) |
-       BIT(OP(SEND_ONLY_WITH_IMMEDIATE & 0x1f)) |
-       BIT(OP(RDMA_WRITE_ONLY & 0x1f)) |
-       BIT(OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE & 0x1f));
+#define OP(x) UC_OP(x)
 
 /**
  * hfi1_make_uc_req - construct a request packet (SEND, RDMA write)
index d502ba0d743ac8f4cb3ed69fe2ae6fefb9d32c05..0a0e93eb80e230fb312c683cf74982b79a5cf704 100644 (file)
@@ -403,6 +403,28 @@ static const opcode_handler opcode_handler_tbl[256] = {
        [IB_OPCODE_CNP]                               = &hfi1_cnp_rcv
 };
 
+#define OPMASK 0x1f
+
+static const u32 pio_opmask[BIT(3)] = {
+       /* RC */
+       [IB_OPCODE_RC >> 5] =
+               BIT(RC_OP(SEND_ONLY) & OPMASK) |
+               BIT(RC_OP(SEND_ONLY_WITH_IMMEDIATE) & OPMASK) |
+               BIT(RC_OP(RDMA_WRITE_ONLY) & OPMASK) |
+               BIT(RC_OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE) & OPMASK) |
+               BIT(RC_OP(RDMA_READ_REQUEST) & OPMASK) |
+               BIT(RC_OP(ACKNOWLEDGE) & OPMASK) |
+               BIT(RC_OP(ATOMIC_ACKNOWLEDGE) & OPMASK) |
+               BIT(RC_OP(COMPARE_SWAP) & OPMASK) |
+               BIT(RC_OP(FETCH_ADD) & OPMASK),
+       /* UC */
+       [IB_OPCODE_UC >> 5] =
+               BIT(UC_OP(SEND_ONLY) & OPMASK) |
+               BIT(UC_OP(SEND_ONLY_WITH_IMMEDIATE) & OPMASK) |
+               BIT(UC_OP(RDMA_WRITE_ONLY) & OPMASK) |
+               BIT(UC_OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE) & OPMASK),
+};
+
 /*
  * System image GUID.
  */
@@ -1210,22 +1232,18 @@ static inline send_routine get_send_routine(struct rvt_qp *qp,
        case IB_QPT_GSI:
        case IB_QPT_UD:
                break;
-       case IB_QPT_RC:
-               if (piothreshold &&
-                   qp->s_cur_size <= min(piothreshold, qp->pmtu) &&
-                   (BIT(get_opcode(h) & 0x1f) & rc_only_opcode) &&
-                   iowait_sdma_pending(&priv->s_iowait) == 0 &&
-                   !sdma_txreq_built(&tx->txreq))
-                       return dd->process_pio_send;
-               break;
        case IB_QPT_UC:
+       case IB_QPT_RC: {
+               u8 op = get_opcode(h);
+
                if (piothreshold &&
                    qp->s_cur_size <= min(piothreshold, qp->pmtu) &&
-                   (BIT(get_opcode(h) & 0x1f) & uc_only_opcode) &&
+                   (BIT(op & OPMASK) & pio_opmask[op >> 5]) &&
                    iowait_sdma_pending(&priv->s_iowait) == 0 &&
                    !sdma_txreq_built(&tx->txreq))
                        return dd->process_pio_send;
                break;
+       }
        default:
                break;
        }
index 0dd65eb46ebe37b6d0eadd74c8aeba848677cb81..1c3815d89eb79c052d1147175538bd619cfef8a5 100644 (file)
@@ -97,6 +97,9 @@ struct hfi1_packet;
 
 #define IB_DEFAULT_GID_PREFIX  cpu_to_be64(0xfe80000000000000ULL)
 
+#define RC_OP(x) IB_OPCODE_RC_##x
+#define UC_OP(x) IB_OPCODE_UC_##x
+
 /* flags passed by hfi1_ib_rcv() */
 enum {
        HFI1_HAS_GRH = (1 << 0),