ARM: dts: r8a7779: Add SCIF fallback compatibility strings
authorGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 29 Jan 2016 09:32:03 +0000 (10:32 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 9 Feb 2016 18:43:11 +0000 (19:43 +0100)
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7779.dtsi

index 93f3fdf95e31ccad598135f7573e65bce5d7ca01..1671839f55a6349c2940e04a0ee513bd402db844 100644 (file)
        };
 
        scif0: serial@ffe40000 {
-               compatible = "renesas,scif-r8a7779", "renesas,scif";
+               compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe40000 0x100>;
                interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF0>;
        };
 
        scif1: serial@ffe41000 {
-               compatible = "renesas,scif-r8a7779", "renesas,scif";
+               compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe41000 0x100>;
                interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF1>;
        };
 
        scif2: serial@ffe42000 {
-               compatible = "renesas,scif-r8a7779", "renesas,scif";
+               compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe42000 0x100>;
                interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF2>;
        };
 
        scif3: serial@ffe43000 {
-               compatible = "renesas,scif-r8a7779", "renesas,scif";
+               compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe43000 0x100>;
                interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF3>;
        };
 
        scif4: serial@ffe44000 {
-               compatible = "renesas,scif-r8a7779", "renesas,scif";
+               compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe44000 0x100>;
                interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF4>;
        };
 
        scif5: serial@ffe45000 {
-               compatible = "renesas,scif-r8a7779", "renesas,scif";
+               compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe45000 0x100>;
                interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF5>;