ARM: tegra: Add memory controller support for Tegra124

Add the memory controller and wire up the interrupt that is used to
report errors. Provide a reference to the memory controller clock and
mark the device as being an IOMMU by adding an #iommu-cells property.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index af2eace5eb63dbcad62c29c877abce0cbc7a83ab..5fcc6e704faaa03d8e783412cbb6ee6d20717198 100644 (file)
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -552,6 +552,17 @@
                reset-names = "fuse";
        };
 
+       mc: memory-controller@0,70019000 {
+               compatible = "nvidia,tegra124-mc";
+               reg = <0x0 0x70019000 0x0 0x1000>;
+               clocks = <&tegra_car TEGRA124_CLK_MC>;
+               clock-names = "mc";
+
+               interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+
+               #iommu-cells = <1>;
+       };
+
        sata@0,70020000 {
                compatible = "nvidia,tegra124-ahci";