emmc: g12a: optimize sd_uart for revA.

PD#170542: optimize sd_uart dts /sd1 for g12a revA.

Change-Id: I35bbb52790a1a11cc1d95d02c6cda717f43c9f75
Signed-off-by: Nan Li <nan.li@amlogic.com>

diff --git a/arch/arm64/boot/dts/amlogic/mesong12a.dtsi b/arch/arm64/boot/dts/amlogic/mesong12a.dtsi
index 2da80f4b82b5a74154fac2d3dd29e960cf7fcb5b..2b1e033f5c2124a749cc3427e48ecbb4c912647f 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/mesong12a.dtsi
+++ b/arch/arm64/boot/dts/amlogic/mesong12a.dtsi
@@ -1379,9 +1379,28 @@
                interrupts = <0 190 1>;
 
                pinctrl-names = "sd_all_pins",
-                       "sd_clk_cmd_pins";
+                       "sd_clk_cmd_pins",
+                       "sd_1bit_pins",
+                       "sd_clk_cmd_uart_pins",
+                       "sd_1bit_uart_pins",
+                       "sd_to_ao_uart_pins",
+                       "ao_to_sd_uart_pins",
+                       "sd_to_ao_jtag_pins",
+                       "ao_to_sd_jtag_pins";
+
                pinctrl-0 = <&sd_all_pins>;
                pinctrl-1 = <&sd_clk_cmd_pins>;
+               pinctrl-2 = <&sd_1bit_pins>;
+               pinctrl-3 = <&sd_to_ao_uart_clr_pins
+                       &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+               pinctrl-4 = <&sd_to_ao_uart_clr_pins
+                       &sd_1bit_pins &ao_to_sd_uart_pins>;
+               pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+               pinctrl-6 = <&sd_to_ao_uart_clr_pins
+                       &ao_to_sd_uart_pins>;
+               pinctrl-7 = <&sd_all_pins &sd_to_ao_uart_pins>;
+               pinctrl-8 = <&sd_to_ao_uart_clr_pins
+                       &ao_to_sd_uart_pins>;
 
                clocks = <&clkc CLKID_SD_EMMC_B>,
                        <&clkc CLKID_SD_EMMC_B_P0_COMP>,