ASoC: mxs-saif: fix setting SAIF1 register
authorJörg Krause <joerg.krause@embedded.rocks>
Fri, 13 Jan 2017 20:44:28 +0000 (21:44 +0100)
committerMark Brown <broonie@kernel.org>
Tue, 17 Jan 2017 18:19:36 +0000 (18:19 +0000)
If SAIF0 is used in master and SAIF1 in slave mode setting the SAIF1
register in mxs_saif_set_dai_fmt() does not have any effect on the
interface as the clk gate needs to be cleared before the register can be
written.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/mxs/mxs-saif.c

index a002ab892772106bae79532d4836814411eaef2f..9012a203613124f36bb55fbfb1eede53bee05561 100644 (file)
@@ -299,6 +299,16 @@ static int mxs_saif_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
                return -EBUSY;
        }
 
+       /* If SAIF1 is configured as slave, the clk gate needs to be cleared
+        * before the register can be written.
+        */
+       if (saif->id != saif->master_id) {
+               __raw_writel(BM_SAIF_CTRL_SFTRST,
+                       saif->base + SAIF_CTRL + MXS_CLR_ADDR);
+               __raw_writel(BM_SAIF_CTRL_CLKGATE,
+                       saif->base + SAIF_CTRL + MXS_CLR_ADDR);
+       }
+
        scr0 = __raw_readl(saif->base + SAIF_CTRL);
        scr0 = scr0 & ~BM_SAIF_CTRL_BITCLK_EDGE & ~BM_SAIF_CTRL_LRCLK_POLARITY \
                & ~BM_SAIF_CTRL_JUSTIFY & ~BM_SAIF_CTRL_DELAY;