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perf: Support Xeon E7's via the Westmere PMU driver
author
Andi Kleen
<ak@linux.intel.com>
Thu, 21 Apr 2011 23:48:35 +0000
(16:48 -0700)
committer
Ingo Molnar
<mingo@elte.hu>
Fri, 22 Apr 2011 06:27:29 +0000
(08:27 +0200)
There's a new model number public, 47, for Xeon E7 (aka Westmere EX).
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: a.p.zijlstra@chello.nl
Link:
http://lkml.kernel.org/r/1303429715-10202-1-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/kernel/cpu/perf_event_intel.c
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diff --git
a/arch/x86/kernel/cpu/perf_event_intel.c
b/arch/x86/kernel/cpu/perf_event_intel.c
index 8fc2b2cee1da32713746cc7e871aab075deaee41..586cced12d1fcbadf7fb3190960681982a4e86e4 100644
(file)
--- a/
arch/x86/kernel/cpu/perf_event_intel.c
+++ b/
arch/x86/kernel/cpu/perf_event_intel.c
@@
-1425,6
+1425,7
@@
static __init int intel_pmu_init(void)
case 37: /* 32 nm nehalem, "Clarkdale" */
case 44: /* 32 nm nehalem, "Gulftown" */
+ case 47: /* 32 nm Xeon E7 */
memcpy(hw_cache_event_ids, westmere_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs,