ARM: dts: at91: sama5d2: add dma properties to UART nodes
authorNicolas Ferre <nicolas.ferre@atmel.com>
Tue, 26 Jan 2016 16:30:18 +0000 (17:30 +0100)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Tue, 1 Mar 2016 12:31:03 +0000 (13:31 +0100)
The dmas/dma-names properties are added to the UART nodes. Note that additional
properties are needed to enable them at the board level: check bindings for
details.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/boot/dts/sama5d2.dtsi

index 3f750f6170f2fc1a1913d5a67d0a4ba28d698958..82d0c19e9720b3eaf11371f896900bf0949da102 100644 (file)
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0xf801c000 0x100>;
                                interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>;
+                               dmas = <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(35))>,
+                                      <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(36))>;
+                               dma-names = "tx", "rx";
                                clocks = <&uart0_clk>;
                                clock-names = "usart";
                                status = "disabled";
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0xf8020000 0x100>;
                                interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>;
+                               dmas = <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(37))>,
+                                      <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(38))>;
+                               dma-names = "tx", "rx";
                                clocks = <&uart1_clk>;
                                clock-names = "usart";
                                status = "disabled";
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0xf8024000 0x100>;
                                interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>;
+                               dmas = <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(39))>,
+                                      <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(40))>;
+                               dma-names = "tx", "rx";
                                clocks = <&uart2_clk>;
                                clock-names = "usart";
                                status = "disabled";
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0xfc008000 0x100>;
                                interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
+                               dmas = <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(41))>,
+                                      <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(42))>;
+                               dma-names = "tx", "rx";
                                clocks = <&uart3_clk>;
                                clock-names = "usart";
                                status = "disabled";
                        uart4: serial@fc00c000 {
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0xfc00c000 0x100>;
+                               dmas = <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(43))>,
+                                      <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(44))>;
+                               dma-names = "tx", "rx";
                                interrupts = <28 IRQ_TYPE_LEVEL_HIGH 7>;
                                clocks = <&uart4_clk>;
                                clock-names = "usart";