dw_dmac: Pass Channel Allocation Order from platform_data

In SPEAr Platform channels 4-7 have more Fifo depth. So we must get better
channel first. This patch introduces concept of channel allocation order in
dw_dmac. If user doesn't pass anything or 0, than normal (ascending) channel
allocation will follow, else channels will be allocated in descending order.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index 6ab440e532bf8a62829f82a377b5a804c802b37a..f413e123405a21a87ce95e443093989b362ca935 100644 (file)
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -1319,7 +1319,11 @@ static int __init dw_probe(struct platform_device *pdev)
                dwc->chan.device = &dw->dma;
                dwc->chan.cookie = dwc->completed = 1;
                dwc->chan.chan_id = i;
-               list_add_tail(&dwc->chan.device_node, &dw->dma.channels);
+               if (pdata->chan_allocation_order == CHAN_ALLOCATION_ASCENDING)
+                       list_add_tail(&dwc->chan.device_node,
+                                       &dw->dma.channels);
+               else
+                       list_add(&dwc->chan.device_node, &dw->dma.channels);
 
                dwc->ch_regs = &__dw_regs(dw)->CHAN[i];
                spin_lock_init(&dwc->lock);

diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h
index deec66b37180cf63d132eab997c45483be991d6a..a18c498984d912a88815e7454e561b2f20b71ad1 100644 (file)
--- a/include/linux/dw_dmac.h
+++ b/include/linux/dw_dmac.h
@@ -22,6 +22,9 @@
 struct dw_dma_platform_data {
        unsigned int    nr_channels;
        bool            is_private;
+#define CHAN_ALLOCATION_ASCENDING      0       /* zero to seven */
+#define CHAN_ALLOCATION_DESCENDING     1       /* seven to zero */
+       unsigned char   chan_allocation_order;
 };
 
 /**