Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa...
authorRussell King <rmk@dyn-67.arm.linux.org.uk>
Thu, 7 Aug 2008 10:05:25 +0000 (11:05 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 7 Aug 2008 10:06:47 +0000 (11:06 +0100)
Conflicts:

arch/arm/mach-pxa/generic.c
arch/arm/mach-pxa/pxa25x.c
arch/arm/mach-pxa/pxa27x.c
arch/arm/mach-pxa/pxa2xx.c
arch/arm/mach-pxa/pxa3xx.c
arch/arm/mach-pxa/reset.c
arch/arm/mach-pxa/spitz.c
arch/arm/mach-pxa/tosa.c
drivers/watchdog/sa1100_wdt.c

13 files changed:
1  2 
arch/arm/mach-pxa/generic.c
arch/arm/mach-pxa/include/mach/hardware.h
arch/arm/mach-pxa/include/mach/reset.h
arch/arm/mach-pxa/pxa25x.c
arch/arm/mach-pxa/pxa27x.c
arch/arm/mach-pxa/pxa2xx.c
arch/arm/mach-pxa/pxa3xx.c
arch/arm/mach-pxa/reset.c
arch/arm/mach-pxa/spitz.c
arch/arm/mach-pxa/tosa.c
arch/arm/mach-sa1100/generic.c
arch/arm/mach-sa1100/include/mach/reset.h
drivers/watchdog/sa1100_wdt.c

index 2834b7fff78c350c3dc3422d7ccf1ed9d6693aa6,36638926c5ce33d3a879755ee341b578b64f756a..ceaed007636631f6aa5d471222dcde9b743010a6
@@@ -25,7 -25,8 +25,8 @@@
  #include <asm/pgtable.h>
  #include <asm/mach/map.h>
  
 -#include <asm/arch/pxa-regs.h>
 -#include <asm/arch/reset.h>
 +#include <mach/pxa-regs.h>
++#include <mach/reset.h>
  
  #include "generic.h"
  
index f8fb1e75997f9450c114298a15d82c7f8fc94d98,0000000000000000000000000000000000000000..e89df4d0d23999278dfdab688ed76aa3ecfc07d9
mode 100644,000000..100644
--- /dev/null
@@@ -1,240 -1,0 +1,235 @@@
- /*
-  * register GPIO as reset generator
-  */
- extern int init_gpio_reset(int gpio);
 +/*
 + *  arch/arm/mach-pxa/include/mach/hardware.h
 + *
 + *  Author:   Nicolas Pitre
 + *  Created:  Jun 15, 2001
 + *  Copyright:        MontaVista Software Inc.
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
 +
 +#ifndef __ASM_ARCH_HARDWARE_H
 +#define __ASM_ARCH_HARDWARE_H
 +
 +/*
 + * We requires absolute addresses.
 + */
 +#define PCIO_BASE             0
 +
 +/*
 + * Workarounds for at least 2 errata so far require this.
 + * The mapping is set in mach-pxa/generic.c.
 + */
 +#define UNCACHED_PHYS_0               0xff000000
 +#define UNCACHED_ADDR         UNCACHED_PHYS_0
 +
 +/*
 + * Intel PXA2xx internal register mapping:
 + *
 + * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
 + * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
 + * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
 + * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
 + * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
 + * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
 + * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
 + *
 + * Note that not all PXA2xx chips implement all those addresses, and the
 + * kernel only maps the minimum needed range of this mapping.
 + */
 +#define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
 +#define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
 +
 +#ifndef __ASSEMBLY__
 +
 +# define __REG(x)     (*((volatile u32 *)io_p2v(x)))
 +
 +/* With indexed regs we don't want to feed the index through io_p2v()
 +   especially if it is a variable, otherwise horrible code will result. */
 +# define __REG2(x,y)  \
 +      (*(volatile u32 *)((u32)&__REG(x) + (y)))
 +
 +# define __PREG(x)    (io_v2p((u32)&(x)))
 +
 +#else
 +
 +# define __REG(x)     io_p2v(x)
 +# define __PREG(x)    io_v2p(x)
 +
 +#endif
 +
 +#ifndef __ASSEMBLY__
 +
 +#ifdef CONFIG_PXA25x
 +#define __cpu_is_pxa21x(id)                           \
 +      ({                                              \
 +              unsigned int _id = (id) >> 4 & 0xf3f;   \
 +              _id == 0x212;                           \
 +      })
 +
 +#define __cpu_is_pxa255(id)                             \
 +      ({                                              \
 +              unsigned int _id = (id) >> 4 & 0xfff;   \
 +              _id == 0x2d0;                           \
 +       })
 +
 +#define __cpu_is_pxa25x(id)                           \
 +      ({                                              \
 +              unsigned int _id = (id) >> 4 & 0xfff;   \
 +              _id == 0x2d0 || _id == 0x290;           \
 +      })
 +#else
 +#define __cpu_is_pxa21x(id)   (0)
 +#define __cpu_is_pxa255(id)   (0)
 +#define __cpu_is_pxa25x(id)   (0)
 +#endif
 +
 +#ifdef CONFIG_PXA27x
 +#define __cpu_is_pxa27x(id)                           \
 +      ({                                              \
 +              unsigned int _id = (id) >> 4 & 0xfff;   \
 +              _id == 0x411;                           \
 +      })
 +#else
 +#define __cpu_is_pxa27x(id)   (0)
 +#endif
 +
 +#ifdef CONFIG_CPU_PXA300
 +#define __cpu_is_pxa300(id)                           \
 +      ({                                              \
 +              unsigned int _id = (id) >> 4 & 0xfff;   \
 +              _id == 0x688;                           \
 +       })
 +#else
 +#define __cpu_is_pxa300(id)   (0)
 +#endif
 +
 +#ifdef CONFIG_CPU_PXA310
 +#define __cpu_is_pxa310(id)                           \
 +      ({                                              \
 +              unsigned int _id = (id) >> 4 & 0xfff;   \
 +              _id == 0x689;                           \
 +       })
 +#else
 +#define __cpu_is_pxa310(id)   (0)
 +#endif
 +
 +#ifdef CONFIG_CPU_PXA320
 +#define __cpu_is_pxa320(id)                           \
 +      ({                                              \
 +              unsigned int _id = (id) >> 4 & 0xfff;   \
 +              _id == 0x603 || _id == 0x682;           \
 +       })
 +#else
 +#define __cpu_is_pxa320(id)   (0)
 +#endif
 +
 +#ifdef CONFIG_CPU_PXA930
 +#define __cpu_is_pxa930(id)                           \
 +      ({                                              \
 +              unsigned int _id = (id) >> 4 & 0xfff;   \
 +              _id == 0x683;           \
 +       })
 +#else
 +#define __cpu_is_pxa930(id)   (0)
 +#endif
 +
 +#define cpu_is_pxa21x()                                       \
 +      ({                                              \
 +              __cpu_is_pxa21x(read_cpuid_id());       \
 +      })
 +
 +#define cpu_is_pxa255()                                 \
 +      ({                                              \
 +              __cpu_is_pxa255(read_cpuid_id());       \
 +      })
 +
 +#define cpu_is_pxa25x()                                       \
 +      ({                                              \
 +              __cpu_is_pxa25x(read_cpuid_id());       \
 +      })
 +
 +#define cpu_is_pxa27x()                                       \
 +      ({                                              \
 +              __cpu_is_pxa27x(read_cpuid_id());       \
 +      })
 +
 +#define cpu_is_pxa300()                                       \
 +      ({                                              \
 +              __cpu_is_pxa300(read_cpuid_id());       \
 +       })
 +
 +#define cpu_is_pxa310()                                       \
 +      ({                                              \
 +              __cpu_is_pxa310(read_cpuid_id());       \
 +       })
 +
 +#define cpu_is_pxa320()                                       \
 +      ({                                              \
 +              __cpu_is_pxa320(read_cpuid_id());       \
 +       })
 +
 +#define cpu_is_pxa930()                                       \
 +      ({                                              \
 +              unsigned int id = read_cpuid(CPUID_ID); \
 +              __cpu_is_pxa930(id);                    \
 +       })
 +
 +/*
 + * CPUID Core Generation Bit
 + * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
 + * == 0x3 for pxa300/pxa310/pxa320
 + */
 +#define __cpu_is_pxa2xx(id)                           \
 +      ({                                              \
 +              unsigned int _id = (id) >> 13 & 0x7;    \
 +              _id <= 0x2;                             \
 +       })
 +
 +#define __cpu_is_pxa3xx(id)                           \
 +      ({                                              \
 +              unsigned int _id = (id) >> 13 & 0x7;    \
 +              _id == 0x3;                             \
 +       })
 +
 +#define cpu_is_pxa2xx()                                       \
 +      ({                                              \
 +              __cpu_is_pxa2xx(read_cpuid_id());       \
 +       })
 +
 +#define cpu_is_pxa3xx()                                       \
 +      ({                                              \
 +              __cpu_is_pxa3xx(read_cpuid_id());       \
 +       })
 +
 +/*
 + * Handy routine to set GPIO alternate functions
 + */
 +extern int pxa_gpio_mode( int gpio_mode );
 +
 +/*
 + * Return GPIO level, nonzero means high, zero is low
 + */
 +extern int pxa_gpio_get_value(unsigned gpio);
 +
 +/*
 + * Set output GPIO level
 + */
 +extern void pxa_gpio_set_value(unsigned gpio, int value);
 +
 +/*
 + * return current memory and LCD clock frequency in units of 10kHz
 + */
 +extern unsigned int get_memclk_frequency_10khz(void);
 +
 +#endif
 +
 +#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
 +#define PCIBIOS_MIN_IO                0
 +#define PCIBIOS_MIN_MEM               0
 +#define pcibios_assign_all_busses()   1
 +#endif
 +
 +#endif  /* _ASM_ARCH_HARDWARE_H */
index 0000000000000000000000000000000000000000,0000000000000000000000000000000000000000..9489a48871a88a8196deb0bb001df9be2cebadb2
new file mode 100644 (file)
--- /dev/null
--- /dev/null
@@@ -1,0 -1,0 +1,18 @@@
++#ifndef __ASM_ARCH_RESET_H
++#define __ASM_ARCH_RESET_H
++
++#define RESET_STATUS_HARDWARE (1 << 0)        /* Hardware Reset */
++#define RESET_STATUS_WATCHDOG (1 << 1)        /* Watchdog Reset */
++#define RESET_STATUS_LOWPOWER (1 << 2)        /* Low Power/Sleep Exit */
++#define RESET_STATUS_GPIO     (1 << 3)        /* GPIO Reset */
++#define RESET_STATUS_ALL      (0xf)
++
++extern unsigned int reset_status;
++extern void clear_reset_status(unsigned int mask);
++
++/*
++ * register GPIO as reset generator
++ */
++extern int init_gpio_reset(int gpio);
++
++#endif /* __ASM_ARCH_RESET_H */
index 3c2d22de9a13db08bb34ba021cb1b9932e81004f,49a7a296ff3109e76bf93bec0ea5811e82309ad6..9e5d8a8c6424f64a0d3bdead6622373f57a6603e
  #include <linux/suspend.h>
  #include <linux/sysdev.h>
  
 -#include <asm/hardware.h>
 -#include <asm/arch/irqs.h>
 -#include <asm/arch/pxa-regs.h>
 -#include <asm/arch/pxa2xx-regs.h>
 -#include <asm/arch/mfp-pxa25x.h>
 -#include <asm/arch/reset.h>
 -#include <asm/arch/pm.h>
 -#include <asm/arch/dma.h>
 +#include <mach/hardware.h>
 +#include <mach/irqs.h>
 +#include <mach/pxa-regs.h>
 +#include <mach/pxa2xx-regs.h>
 +#include <mach/mfp-pxa25x.h>
++#include <mach/reset.h>
 +#include <mach/pm.h>
 +#include <mach/dma.h>
  
  #include "generic.h"
  #include "devices.h"
index 6bec43484ba7dc5e05b555672a3afa9b63338908,a8c12347a5a955f13a072fc13204f3d6875f6b04..f9f6a9c31f4b06237ab4751c66b9bfc68d55e254
  #include <linux/platform_device.h>
  #include <linux/sysdev.h>
  
 -#include <asm/hardware.h>
 +#include <mach/hardware.h>
  #include <asm/irq.h>
 -#include <asm/arch/irqs.h>
 -#include <asm/arch/pxa-regs.h>
 -#include <asm/arch/pxa2xx-regs.h>
 -#include <asm/arch/mfp-pxa27x.h>
 -#include <asm/arch/reset.h>
 -#include <asm/arch/ohci.h>
 -#include <asm/arch/pm.h>
 -#include <asm/arch/dma.h>
 -#include <asm/arch/i2c.h>
 +#include <mach/irqs.h>
 +#include <mach/pxa-regs.h>
 +#include <mach/pxa2xx-regs.h>
 +#include <mach/mfp-pxa27x.h>
++#include <mach/reset.h>
 +#include <mach/ohci.h>
 +#include <mach/pm.h>
 +#include <mach/dma.h>
 +#include <mach/i2c.h>
  
  #include "generic.h"
  #include "devices.h"
index 00b4de6d6bdd421a754330eef2c2cbadc1a553f8,d93d3e6a6e2777a6b83461ae166599330844ce89..73d04d81c75a2307b245ce27b155e01e5838eea1
  #include <linux/kernel.h>
  #include <linux/device.h>
  
 -#include <asm/hardware.h>
 -#include <asm/arch/pxa2xx-regs.h>
 -#include <asm/arch/mfp-pxa2xx.h>
 -#include <asm/arch/mfp-pxa25x.h>
 -#include <asm/arch/reset.h>
 -#include <asm/arch/irda.h>
++#include <mach/hardware.h>
++#include <mach/pxa2xx-regs.h>
 +#include <mach/mfp-pxa2xx.h>
 +#include <mach/mfp-pxa25x.h>
++#include <mach/reset.h>
 +#include <mach/irda.h>
  
+ void pxa2xx_clear_reset_status(unsigned int mask)
+ {
+       /* RESET_STATUS_* has a 1:1 mapping with RCSR */
+       RCSR = mask;
+ }
  static unsigned long pxa2xx_mfp_fir[] = {
        GPIO46_FICP_RXD,
        GPIO47_FICP_TXD,
index 37b07212b5a519760785bb82cfc5057dcab1cf0f,3d36c790f5ce974009bbc8e313c5f58a08639f6d..03cbc38103ed230d3bf4f1309b9d8b6a6d0fba99
  #include <linux/io.h>
  #include <linux/sysdev.h>
  
 -#include <asm/hardware.h>
 -#include <asm/arch/pxa3xx-regs.h>
 -#include <asm/arch/reset.h>
 -#include <asm/arch/ohci.h>
 -#include <asm/arch/pm.h>
 -#include <asm/arch/dma.h>
 -#include <asm/arch/ssp.h>
 +#include <mach/hardware.h>
 +#include <mach/pxa3xx-regs.h>
++#include <mach/reset.h>
 +#include <mach/ohci.h>
 +#include <mach/pm.h>
 +#include <mach/dma.h>
 +#include <mach/ssp.h>
  
  #include "generic.h"
  #include "devices.h"
index fabead71d681a88272343bbd01b296648f0e1379,56f60d923a9dc7a71e2ee2dfe081450fbfe017f6..9996c612c3d685d2ed749578f118b93262bfb6cc
  #include <asm/io.h>
  #include <asm/proc-fns.h>
  
 -#include <asm/arch/pxa-regs.h>
 -#include <asm/arch/reset.h>
 +#include <mach/pxa-regs.h>
- #include <mach/pxa2xx-regs.h>
++#include <mach/reset.h>
+ unsigned int reset_status;
+ EXPORT_SYMBOL(reset_status);
  
  static void do_hw_reset(void);
  
index 26b9fa56cffd9ed6b81a1fc8c453855f5892dca0,207fe3e6a3d200d8e07d3261ff5b40c7a2dae9e7..cd39005c98ff2279124a2b23d00b4fb79eae41a3
  #include <asm/mach/map.h>
  #include <asm/mach/irq.h>
  
 -#include <asm/arch/pxa-regs.h>
 -#include <asm/arch/pxa2xx-regs.h>
 -#include <asm/arch/pxa2xx-gpio.h>
 -#include <asm/arch/pxa27x-udc.h>
 -#include <asm/arch/reset.h>
 -#include <asm/arch/irda.h>
 -#include <asm/arch/mmc.h>
 -#include <asm/arch/ohci.h>
 -#include <asm/arch/udc.h>
 -#include <asm/arch/pxafb.h>
 -#include <asm/arch/akita.h>
 -#include <asm/arch/spitz.h>
 -#include <asm/arch/sharpsl.h>
 +#include <mach/pxa-regs.h>
 +#include <mach/pxa2xx-regs.h>
 +#include <mach/pxa2xx-gpio.h>
 +#include <mach/pxa27x-udc.h>
++#include <mach/reset.h>
 +#include <mach/irda.h>
 +#include <mach/mmc.h>
 +#include <mach/ohci.h>
 +#include <mach/udc.h>
 +#include <mach/pxafb.h>
 +#include <mach/akita.h>
 +#include <mach/spitz.h>
 +#include <mach/sharpsl.h>
  
  #include <asm/mach/sharpsl_param.h>
  #include <asm/hardware/scoop.h>
index 38bc59c441101324e94b668ee96ec57cf907366b,4bd7d4f006e27840f8600b279e04d84bc3f55d7a..5dab30eafddc83c750d46a7990b51c1c032c8271
  
  #include <asm/setup.h>
  #include <asm/mach-types.h>
 -#include <asm/arch/pxa2xx-regs.h>
 -#include <asm/arch/mfp-pxa25x.h>
 -#include <asm/arch/reset.h>
 -#include <asm/arch/irda.h>
 -#include <asm/arch/i2c.h>
 -#include <asm/arch/mmc.h>
 -#include <asm/arch/udc.h>
 -#include <asm/arch/tosa_bt.h>
 +#include <mach/pxa2xx-regs.h>
 +#include <mach/mfp-pxa25x.h>
++#include <mach/reset.h>
 +#include <mach/irda.h>
 +#include <mach/i2c.h>
 +#include <mach/mmc.h>
 +#include <mach/udc.h>
 +#include <mach/tosa_bt.h>
  
  #include <asm/mach/arch.h>
 -#include <asm/arch/tosa.h>
 +#include <mach/tosa.h>
  
  #include <asm/hardware/scoop.h>
  #include <asm/mach/sharpsl_param.h>
Simple merge
index 0000000000000000000000000000000000000000,0000000000000000000000000000000000000000..f61957e6842a50a88fd9d5cf042e253bf296ec6d
new file mode 100644 (file)
--- /dev/null
--- /dev/null
@@@ -1,0 -1,0 +1,18 @@@
++#ifndef __ASM_ARCH_RESET_H
++#define __ASM_ARCH_RESET_H
++
++#include "hardware.h"
++
++#define RESET_STATUS_HARDWARE (1 << 0)        /* Hardware Reset */
++#define RESET_STATUS_WATCHDOG (1 << 1)        /* Watchdog Reset */
++#define RESET_STATUS_LOWPOWER (1 << 2)        /* Exit from Low Power/Sleep */
++#define RESET_STATUS_GPIO     (1 << 3)        /* GPIO Reset */
++#define RESET_STATUS_ALL      (0xf)
++
++extern unsigned int reset_status;
++static inline void clear_reset_status(unsigned int mask)
++{
++      RCSR = mask;
++}
++
++#endif /* __ASM_ARCH_RESET_H */
index 52a533c274fdda2afc785e00af1af6f76ffa7637,e42002d2f815898069dd13ff365b96f616554d3f..97d9da758dccd7a0977ffea9d93ec0938f4b749b
  #include <linux/bitops.h>
  
  #ifdef CONFIG_ARCH_PXA
 -#include <asm/arch/pxa-regs.h>
 +#include <mach/pxa-regs.h>
  #endif
  
 -#include <asm/arch/reset.h>
 -
 -#include <asm/hardware.h>
++#include <mach/reset.h>
 +#include <mach/hardware.h>
  #include <asm/uaccess.h>
  
  #define OSCR_FREQ             CLOCK_TICK_RATE