vpu: udpate vpu mem_pd control for g12b

PD#165090: vpu: udpate vpu mem_pd control for g12b

Change-Id: I7ac907d8b00e2ef0884082c3a56afc6b66dd00d5
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>

diff --git a/drivers/amlogic/media/common/vpu/vpu.c b/drivers/amlogic/media/common/vpu/vpu.c
index a10c7ef896ab2853a90debf01934ba7cd6d4f22a..bc5dddf247ab9883f6a9c81b27e50e1ab93506ee 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu.c
+++ b/drivers/amlogic/media/common/vpu/vpu.c
@@ -1329,10 +1329,10 @@ static struct vpu_data_s vpu_data_g12a = {
        .mem_pd_reg2_valid = 1,
 
        .mem_pd_table_cnt =
-               sizeof(vpu_mem_pd_g12a) / sizeof(struct vpu_ctrl_s),
+               sizeof(vpu_mem_pd_g12b) / sizeof(struct vpu_ctrl_s),
        .clk_gate_table_cnt =
                sizeof(vpu_clk_gate_g12a) / sizeof(struct vpu_ctrl_s),
-       .mem_pd_table = vpu_mem_pd_g12a,
+       .mem_pd_table = vpu_mem_pd_g12b,
        .clk_gate_table = vpu_clk_gate_g12a,
 
        .power_on  = vpu_power_on_txlx,

diff --git a/drivers/amlogic/media/common/vpu/vpu_ctrl.h b/drivers/amlogic/media/common/vpu/vpu_ctrl.h
index 6ba2f74bb6d48fff229bd0352e4f18848566844d..0f099070faea44aabfc37b70d8bc38af48f4c6ed 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu_ctrl.h
+++ b/drivers/amlogic/media/common/vpu/vpu_ctrl.h
@@ -280,6 +280,52 @@ static struct vpu_ctrl_s vpu_mem_pd_g12a[] = {
        {VPU_MOD_MAX,         VPU_REG_END,           0,   0},
 };
 
+static struct vpu_ctrl_s vpu_mem_pd_g12b[] = {
+       /* vpu module,      reg,                  bit,  len */
+       {VPU_VIU_OSD1,        HHI_VPU_MEM_PD_REG0,   0,   2},
+       {VPU_VIU_OSD2,        HHI_VPU_MEM_PD_REG0,   2,   2},
+       {VPU_VIU_VD1,         HHI_VPU_MEM_PD_REG0,   4,   2},
+       {VPU_VIU_VD2,         HHI_VPU_MEM_PD_REG0,   6,   2},
+       {VPU_VIU_CHROMA,      HHI_VPU_MEM_PD_REG0,   8,   2},
+       {VPU_VIU_OFIFO,       HHI_VPU_MEM_PD_REG0,  10,   2},
+       {VPU_VIU_SCALE,       HHI_VPU_MEM_PD_REG0,  12,   2},
+       {VPU_VIU_OSD_SCALE,   HHI_VPU_MEM_PD_REG0,  14,   2},
+       {VPU_VIU_VDIN0,       HHI_VPU_MEM_PD_REG0,  16,   2},
+       {VPU_VIU_VDIN1,       HHI_VPU_MEM_PD_REG0,  18,   2},
+       {VPU_VIU_SRSCL,       HHI_VPU_MEM_PD_REG0,  20,   2},
+       {VPU_AFBC_DEC1,       HHI_VPU_MEM_PD_REG0,  22,   2},
+       {VPU_VIU_DI_SCALE,    HHI_VPU_MEM_PD_REG0,  24,   2},
+       {VPU_DI_PRE,          HHI_VPU_MEM_PD_REG0,  26,   2},
+       {VPU_DI_POST,         HHI_VPU_MEM_PD_REG0,  28,   2},
+       {VPU_SHARP,           HHI_VPU_MEM_PD_REG0,  30,   2},
+       {VPU_VIU2_OSD1,       HHI_VPU_MEM_PD_REG1,   0,   2},
+       {VPU_VIU2_OFIFO,      HHI_VPU_MEM_PD_REG1,   2,   2},
+       {VPU_VKSTONE,         HHI_VPU_MEM_PD_REG1,   4,   2},
+       {VPU_DOLBY_CORE3,     HHI_VPU_MEM_PD_REG1,   6,   2},
+       {VPU_DOLBY0,          HHI_VPU_MEM_PD_REG1,   8,   2},
+       {VPU_DOLBY1A,         HHI_VPU_MEM_PD_REG1,  10,   2},
+       {VPU_DOLBY1B,         HHI_VPU_MEM_PD_REG1,  12,   2},
+       {VPU_VPU_ARB,         HHI_VPU_MEM_PD_REG1,  14,   2},
+       {VPU_AFBC_DEC,        HHI_VPU_MEM_PD_REG1,  16,   2},
+       {VPU_VD2_SCALE,       HHI_VPU_MEM_PD_REG1,  18,   2},
+       {VPU_VENCP,           HHI_VPU_MEM_PD_REG1,  20,   2},
+       {VPU_VENCL,           HHI_VPU_MEM_PD_REG1,  22,   2},
+       {VPU_VENCI,           HHI_VPU_MEM_PD_REG1,  24,   2},
+       {VPU_VD2_OSD2_SCALE,  HHI_VPU_MEM_PD_REG1,  30,   2},
+       {VPU_VIU_WM,          HHI_VPU_MEM_PD_REG2,   0,   2},
+       {VPU_VIU_OSD3,        HHI_VPU_MEM_PD_REG2,   4,   2},
+       {VPU_VIU_OSD4,        HHI_VPU_MEM_PD_REG2,   6,   2},
+       {VPU_MAIL_AFBCD,      HHI_VPU_MEM_PD_REG2,   8,   2},
+       {VPU_VD1_SCALE,       HHI_VPU_MEM_PD_REG2,  10,   2},
+       {VPU_OSD_BLD34,       HHI_VPU_MEM_PD_REG2,  12,   2},
+       {VPU_PRIME_DOLBY_RAM, HHI_VPU_MEM_PD_REG2,  14,   2},
+       {VPU_VD2_OFIFO,       HHI_VPU_MEM_PD_REG2,  16,   2},
+       {VPU_LUT3D,           HHI_VPU_MEM_PD_REG2,  20,   2},
+       {VPU_VIU2_OSD_ROT,    HHI_VPU_MEM_PD_REG2,  22,   2},
+       {VPU_RDMA,            HHI_VPU_MEM_PD_REG2,  30,   2},
+       {VPU_MOD_MAX,         VPU_REG_END,           0,   0},
+};
+
 /* ******************************************************* */
 /*                 VPU clock gate table                    */
 /* ******************************************************* */

diff --git a/drivers/amlogic/media/common/vpu/vpu_module.h b/drivers/amlogic/media/common/vpu/vpu_module.h
index beb6bbf812cfc348487aa0f38f802622b5d5c362..85f6efd3dc68c59d96175c4fa6b0fa20019826b0 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu_module.h
+++ b/drivers/amlogic/media/common/vpu/vpu_module.h
@@ -73,6 +73,8 @@ static char *vpu_mod_table[] = {
        "osd_bld34",
        "prime_dolby_ram",
        "vd2_ofifo",
+       "lut3d",
+       "viu2_osd_rotation",
        "rdma",
 
        "vpu_mod_max",

diff --git a/include/linux/amlogic/media/vpu/vpu.h b/include/linux/amlogic/media/vpu/vpu.h
index c0d5e143ff543aa932f2454cf8121abda430f07b..dac73eeab268dfd01852b750f8629509d588fa75 100644 (file)
--- a/include/linux/amlogic/media/vpu/vpu.h
+++ b/include/linux/amlogic/media/vpu/vpu.h
@@ -73,6 +73,8 @@ enum vpu_mod_e {
        VPU_OSD_BLD34,        /* reg2[13:12] //G12A */
        VPU_PRIME_DOLBY_RAM,  /* reg2[15:14] //G12A */
        VPU_VD2_OFIFO,        /* reg2[17:16] //G12A */
+       VPU_LUT3D,            /* reg2[21:20] //G12B */
+       VPU_VIU2_OSD_ROT,     /* reg2[23:22] //G12B */
        VPU_RDMA,             /* reg2[31:30] //G12A */
 
        VPU_MOD_MAX,