[NISTC_ATRIG_ETC_REG] = { 0x17a, 2 },
[NISTC_AI_START_STOP_REG] = { 0x17c, 2 },
[NISTC_AI_TRIG_SEL_REG] = { 0x17e, 2 },
- [AI_DIV_Load_A_Register] = { 0x180, 4 },
+ [NISTC_AI_DIV_LOADA_REG] = { 0x180, 4 },
[AO_Start_Select_Register] = { 0x184, 2 },
[AO_Trigger_Select_Register] = { 0x186, 2 },
[G_Autoincrement_Register(0)] = { 0x188, 2 },
#define NISTC_AI_TRIG_START1_EDGE BIT(5)
#define NISTC_AI_TRIG_START1_SEL(x) (((x) & 0x1f) << 0)
+#define NISTC_AI_DIV_LOADA_REG 64
+
#define AI_Status_1_Register 2
#define Interrupt_A_St 0x8000
#define AI_FIFO_Full_St 0x4000
#define AO_BC_Save_Registers 18
#define AO_UC_Save_Registers 20
-#define AI_DIV_Load_A_Register 64
-
#define AO_Start_Select_Register 66
#define AO_UI2_Software_Gate _bit15
#define AO_UI2_External_Gate_Polarity _bit14