xhci: Export Latency Tolerance Messaging capabilities.
authorSarah Sharp <sarah.a.sharp@linux.intel.com>
Mon, 25 Jun 2012 15:24:30 +0000 (08:24 -0700)
committerSarah Sharp <sarah.a.sharp@linux.intel.com>
Wed, 11 Jul 2012 11:06:48 +0000 (07:06 -0400)
Some xHCI host controllers may have optional support for Latency
Tolerance Messaging (LTM).  This allows USB 3.0 devices that support LTM
to pass information about how much latency they can tolerate to the xHC.
A PCI xHCI host will use this information to update the PCI Latency
Tolerance Request (LTR) info.  The goal of this is to gather latency
information for the system, to enable hardware-driven C states, and the
shutting down of PLLs.

Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
drivers/usb/host/xhci-hub.c

index 2732ef660c5c08b85baeb38c23d5ec597bf15673..6d21030e2b7bec2eebcb37ff4e1cabb719d9510a 100644 (file)
@@ -508,12 +508,18 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
                if (hcd->speed != HCD_USB3)
                        goto error;
 
+               /* Set the U1 and U2 exit latencies. */
                memcpy(buf, &usb_bos_descriptor,
                                USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE);
                temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
                buf[12] = HCS_U1_LATENCY(temp);
                put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);
 
+               /* Indicate whether the host has LTM support. */
+               temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
+               if (HCC_LTC(temp))
+                       buf[8] |= USB_LTM_SUPPORT;
+
                spin_unlock_irqrestore(&xhci->lock, flags);
                return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE;
        case GetPortStatus: