MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value

Broadcom BCM63xx DSL SoCs have a L1-cache line size of 16 bytes (shift
value of 4) instead of the currently configured 32 bytes L1-cache line
size.

Reported-by: Daniel Gonzalez <dgcbueu@gmail.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index db8fae3341e2ddf316f07d6dbf9e7ac801526305..9a05292cfae7e595dbfc7993224ff1f6acdc1177 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -138,6 +138,7 @@ config BCM63XX
        select SWAP_IO_SPACE
        select ARCH_REQUIRE_GPIOLIB
        select HAVE_CLK
+       select MIPS_L1_CACHE_SHIFT_4
        help
         Support for BCM63XX based boards